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authorEvan Cheng <evan.cheng@apple.com>2010-10-28 06:47:08 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-10-28 06:47:08 +0000
commitff310737e5d5cbb5e29637f9d9f2c8a31a60afc8 (patch)
tree170667846f8da80d9444d3b1618f40bcdb257793 /llvm/test
parent0165e255640f63d467f58993ce922cfcad847866 (diff)
downloadbcm5719-llvm-ff310737e5d5cbb5e29637f9d9f2c8a31a60afc8.tar.gz
bcm5719-llvm-ff310737e5d5cbb5e29637f9d9f2c8a31a60afc8.zip
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
llvm-svn: 117531
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/ARM/fabss.ll2
-rw-r--r--llvm/test/CodeGen/ARM/fadds.ll2
-rw-r--r--llvm/test/CodeGen/ARM/fdivs.ll2
-rw-r--r--llvm/test/CodeGen/ARM/fmacs.ll2
-rw-r--r--llvm/test/CodeGen/ARM/fmscs.ll4
-rw-r--r--llvm/test/CodeGen/ARM/fmuls.ll2
-rw-r--r--llvm/test/CodeGen/ARM/shifter_operand.ll2
7 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/ARM/fabss.ll b/llvm/test/CodeGen/ARM/fabss.ll
index dfc1e0a957c..f03282bdab7 100644
--- a/llvm/test/CodeGen/ARM/fabss.ll
+++ b/llvm/test/CodeGen/ARM/fabss.ll
@@ -24,4 +24,4 @@ declare float @fabsf(float)
; CORTEXA8: test:
; CORTEXA8: vabs.f32 d1, d1
; CORTEXA9: test:
-; CORTEXA9: vabs.f32 s0, s0
+; CORTEXA9: vabs.f32 s1, s1
diff --git a/llvm/test/CodeGen/ARM/fadds.ll b/llvm/test/CodeGen/ARM/fadds.ll
index 113f0e29bd1..749690e98d0 100644
--- a/llvm/test/CodeGen/ARM/fadds.ll
+++ b/llvm/test/CodeGen/ARM/fadds.ll
@@ -20,4 +20,4 @@ entry:
; CORTEXA8: test:
; CORTEXA8: vadd.f32 d0, d1, d0
; CORTEXA9: test:
-; CORTEXA9: vadd.f32 s0, s0, s1
+; CORTEXA9: vadd.f32 s0, s1, s0
diff --git a/llvm/test/CodeGen/ARM/fdivs.ll b/llvm/test/CodeGen/ARM/fdivs.ll
index 9af1217de1d..0c314957929 100644
--- a/llvm/test/CodeGen/ARM/fdivs.ll
+++ b/llvm/test/CodeGen/ARM/fdivs.ll
@@ -20,4 +20,4 @@ entry:
; CORTEXA8: test:
; CORTEXA8: vdiv.f32 s0, s1, s0
; CORTEXA9: test:
-; CORTEXA9: vdiv.f32 s0, s0, s1
+; CORTEXA9: vdiv.f32 s0, s1, s0
diff --git a/llvm/test/CodeGen/ARM/fmacs.ll b/llvm/test/CodeGen/ARM/fmacs.ll
index c4ceca9828b..f8b47b5bac0 100644
--- a/llvm/test/CodeGen/ARM/fmacs.ll
+++ b/llvm/test/CodeGen/ARM/fmacs.ll
@@ -21,4 +21,4 @@ entry:
; CORTEXA8: test:
; CORTEXA8: vmul.f32 d0, d1, d0
; CORTEXA9: test:
-; CORTEXA9: vmla.f32 s0, s1, s2
+; CORTEXA9: vmla.f32 s2, s1, s0
diff --git a/llvm/test/CodeGen/ARM/fmscs.ll b/llvm/test/CodeGen/ARM/fmscs.ll
index 19359a1ae6b..7a70543dee6 100644
--- a/llvm/test/CodeGen/ARM/fmscs.ll
+++ b/llvm/test/CodeGen/ARM/fmscs.ll
@@ -19,6 +19,6 @@ entry:
; NFP0: vnmls.f32 s2, s1, s0
; CORTEXA8: test:
-; CORTEXA8: vnmls.f32 s1, s2, s0
+; CORTEXA8: vnmls.f32 s2, s1, s0
; CORTEXA9: test:
-; CORTEXA9: vnmls.f32 s0, s1, s2
+; CORTEXA9: vnmls.f32 s2, s1, s0
diff --git a/llvm/test/CodeGen/ARM/fmuls.ll b/llvm/test/CodeGen/ARM/fmuls.ll
index bfafd20c860..ef4e3e52818 100644
--- a/llvm/test/CodeGen/ARM/fmuls.ll
+++ b/llvm/test/CodeGen/ARM/fmuls.ll
@@ -20,4 +20,4 @@ entry:
; CORTEXA8: test:
; CORTEXA8: vmul.f32 d0, d1, d0
; CORTEXA9: test:
-; CORTEXA9: vmul.f32 s0, s0, s1
+; CORTEXA9: vmul.f32 s0, s1, s0
diff --git a/llvm/test/CodeGen/ARM/shifter_operand.ll b/llvm/test/CodeGen/ARM/shifter_operand.ll
index 897fb1af01c..01e3a922f65 100644
--- a/llvm/test/CodeGen/ARM/shifter_operand.ll
+++ b/llvm/test/CodeGen/ARM/shifter_operand.ll
@@ -36,8 +36,8 @@ entry:
; lsl #2 is free
; A9: test3:
-; A9: ldr r1, [r1, r2, lsl #2]
; A9: ldr r0, [r0, r2, lsl #2]
+; A9: ldr r1, [r1, r2, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
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