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authorJim Grosbach <grosbach@apple.com>2010-09-17 21:58:46 +0000
committerJim Grosbach <grosbach@apple.com>2010-09-17 21:58:46 +0000
commit6d800f88da75ea44378cf4eb922b85b00538387c (patch)
treef88f7a79fc2de50068307bbb5498457b00ac53e1 /llvm/test/CodeGen/ARM/mul_const.ll
parent0dcd3362bd809065be1b3d5d2b45ef6117c4ad9e (diff)
downloadbcm5719-llvm-6d800f88da75ea44378cf4eb922b85b00538387c.tar.gz
bcm5719-llvm-6d800f88da75ea44378cf4eb922b85b00538387c.zip
Update tests to handle MC-inst instruction printing of shift operations. The
legacy asm printer uses instructions of the form, "mov r0, r0, lsl #3", while the MC-instruction printer uses the form "lsl r0, r0, #3". The latter mnemonic is correct and preferred according the ARM documentation (A8.6.98). The former are pseudo-instructions for the latter. llvm-svn: 114221
Diffstat (limited to 'llvm/test/CodeGen/ARM/mul_const.ll')
-rw-r--r--llvm/test/CodeGen/ARM/mul_const.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/mul_const.ll b/llvm/test/CodeGen/ARM/mul_const.ll
index 8c102464612..3cb8a8e816f 100644
--- a/llvm/test/CodeGen/ARM/mul_const.ll
+++ b/llvm/test/CodeGen/ARM/mul_const.ll
@@ -36,7 +36,7 @@ define i32 @t12288(i32 %v) nounwind readnone {
entry:
; CHECK: t12288:
; CHECK: add r0, r0, r0, lsl #1
-; CHECK: mov r0, r0, lsl #12
+; CHECK: lsl{{.*}}#12
%0 = mul i32 %v, 12288
ret i32 %0
}
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