From 6d800f88da75ea44378cf4eb922b85b00538387c Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Fri, 17 Sep 2010 21:58:46 +0000 Subject: Update tests to handle MC-inst instruction printing of shift operations. The legacy asm printer uses instructions of the form, "mov r0, r0, lsl #3", while the MC-instruction printer uses the form "lsl r0, r0, #3". The latter mnemonic is correct and preferred according the ARM documentation (A8.6.98). The former are pseudo-instructions for the latter. llvm-svn: 114221 --- llvm/test/CodeGen/ARM/mul_const.ll | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'llvm/test/CodeGen/ARM/mul_const.ll') diff --git a/llvm/test/CodeGen/ARM/mul_const.ll b/llvm/test/CodeGen/ARM/mul_const.ll index 8c102464612..3cb8a8e816f 100644 --- a/llvm/test/CodeGen/ARM/mul_const.ll +++ b/llvm/test/CodeGen/ARM/mul_const.ll @@ -36,7 +36,7 @@ define i32 @t12288(i32 %v) nounwind readnone { entry: ; CHECK: t12288: ; CHECK: add r0, r0, r0, lsl #1 -; CHECK: mov r0, r0, lsl #12 +; CHECK: lsl{{.*}}#12 %0 = mul i32 %v, 12288 ret i32 %0 } -- cgit v1.2.3