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| author | Joel Galenson <jgalenson@google.com> | 2018-01-17 19:19:05 +0000 |
|---|---|---|
| committer | Joel Galenson <jgalenson@google.com> | 2018-01-17 19:19:05 +0000 |
| commit | fe7fa40869b5b85cf7a99e7ecd13468ddfd955b1 (patch) | |
| tree | f7d9eb23b8ec28150dc98079420c55c31878385a /llvm/test/CodeGen/ARM/intrinsics-overflow.ll | |
| parent | 727f153b6fe28918a28c5b984d79274a10e8f0f1 (diff) | |
| download | bcm5719-llvm-fe7fa40869b5b85cf7a99e7ecd13468ddfd955b1.tar.gz bcm5719-llvm-fe7fa40869b5b85cf7a99e7ecd13468ddfd955b1.zip | |
[ARM] Optimize {s,u}{add,sub}.with.overflow.
The ARM backend contains code that tries to optimize compares by replacing them with an existing instruction that sets the flags the same way. This allows it to replace a "cmp" with a "adds", generalizing the code that replaces "cmp" with "sub". It also heuristically disables sinking of instructions that could potentially be used to replace compares (currently only if they're next to each other).
Differential revision: https://reviews.llvm.org/D38378
llvm-svn: 322737
Diffstat (limited to 'llvm/test/CodeGen/ARM/intrinsics-overflow.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/intrinsics-overflow.ll | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/ARM/intrinsics-overflow.ll b/llvm/test/CodeGen/ARM/intrinsics-overflow.ll index af555d2240c..5f78b13c18d 100644 --- a/llvm/test/CodeGen/ARM/intrinsics-overflow.ll +++ b/llvm/test/CodeGen/ARM/intrinsics-overflow.ll @@ -33,10 +33,10 @@ define i32 @sadd_overflow(i32 %a, i32 %b) #0 { ; CHECK-LABEL: sadd_overflow: - ; ARM: add r[[R2:[0-9]+]], r[[R0:[0-9]+]], r[[R1:[0-9]+]] - ; ARM: mov r[[R1]], #1 - ; ARM: cmp r[[R2]], r[[R0]] - ; ARM: movvc r[[R1]], #0 + ; ARM: adds r[[R2:[0-9]+]], r[[R0:[0-9]+]], r[[R1:[0-9]+]] + ; ARM: mov r[[R0]], #1 + ; ARM: movvc r[[R0]], #0 + ; ARM: mov pc, lr ; THUMBV6: mov r[[R2:[0-9]+]], r[[R0:[0-9]+]] ; THUMBV6: adds r[[R3:[0-9]+]], r[[R2]], r[[R1:[0-9]+]] @@ -47,11 +47,10 @@ define i32 @sadd_overflow(i32 %a, i32 %b) #0 { ; THUMBV6: mov r[[R0]], r[[R1]] ; THUMBV6: .L[[LABEL]]: - ; THUMBV7: movs r[[R1]], #1 - ; THUMBV7: cmp r[[R2]], r[[R0]] + ; THUMBV7: adds r[[R2:[0-9]+]], r[[R0]], r[[R1:[0-9]+]] + ; THUMBV7: mov.w r[[R0:[0-9]+]], #1 ; THUMBV7: it vc - ; THUMBV7: movvc r[[R1]], #0 - ; THUMBV7: mov r[[R0]], r[[R1]] + ; THUMBV7: movvc r[[R0]], #0 } define i32 @usub_overflow(i32 %a, i32 %b) #0 { |
