diff options
| author | David Green <david.green@arm.com> | 2019-02-21 11:03:13 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2019-02-21 11:03:13 +0000 |
| commit | 7a183a86beb4e5e5f310a6853211009f3d432e57 (patch) | |
| tree | 42733e7420e4d093d9b4e9cf9940565cc9adb276 /llvm/test/CodeGen/ARM/intrinsics-overflow.ll | |
| parent | 43fceb27271f6cb83cbeda627f6228510cf4f2b8 (diff) | |
| download | bcm5719-llvm-7a183a86beb4e5e5f310a6853211009f3d432e57.tar.gz bcm5719-llvm-7a183a86beb4e5e5f310a6853211009f3d432e57.zip | |
Revert 354564: [ARM] Add some missing thumb1 opcodes to enable peephole optimisation of CMPs
I believe it's causing bootstrap failures for A32 code. I'll take a look at
what's wrong.
llvm-svn: 354569
Diffstat (limited to 'llvm/test/CodeGen/ARM/intrinsics-overflow.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/intrinsics-overflow.ll | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/intrinsics-overflow.ll b/llvm/test/CodeGen/ARM/intrinsics-overflow.ll index c3f64072d7d..d4c20dfacce 100644 --- a/llvm/test/CodeGen/ARM/intrinsics-overflow.ll +++ b/llvm/test/CodeGen/ARM/intrinsics-overflow.ll @@ -38,7 +38,8 @@ define i32 @sadd_overflow(i32 %a, i32 %b) #0 { ; ARM: movvc r[[R0]], #0 ; ARM: mov pc, lr - ; THUMBV6: adds r0, r0, r1 + ; THUMBV6: adds r1, r0, r1 + ; THUMBV6: cmp r1, r0 ; THUMBV6: bvc .LBB1_2 ; THUMBV7: adds r[[R2:[0-9]+]], r[[R0]], r[[R1:[0-9]+]] |
