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| author | Jim Grosbach <grosbach@apple.com> | 2012-02-24 00:33:36 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-02-24 00:33:36 +0000 |
| commit | c01104dfbf92f941dfd3e6b931e6eabf08c1327a (patch) | |
| tree | 5e60c7dbc49275076a7c9b13d92efeda03ae069d /llvm/test/CodeGen/ARM/avoid-cpsr-rmw.ll | |
| parent | 77a9255329be5d8bb8a03f3188dadb9907c6a7f3 (diff) | |
| download | bcm5719-llvm-c01104dfbf92f941dfd3e6b931e6eabf08c1327a.tar.gz bcm5719-llvm-c01104dfbf92f941dfd3e6b931e6eabf08c1327a.zip | |
Thumb2 size reduction fix for tied operands of tMUL.
The tied source operand of tMUL is the second source operand, not the
first like every other two-address thumb instruction. Special case it
in the size reduction pass to make sure we create the tMUL instruction
properly.
llvm-svn: 151315
Diffstat (limited to 'llvm/test/CodeGen/ARM/avoid-cpsr-rmw.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/avoid-cpsr-rmw.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/avoid-cpsr-rmw.ll b/llvm/test/CodeGen/ARM/avoid-cpsr-rmw.ll index 877ec180626..1b385ab79c4 100644 --- a/llvm/test/CodeGen/ARM/avoid-cpsr-rmw.ll +++ b/llvm/test/CodeGen/ARM/avoid-cpsr-rmw.ll @@ -6,9 +6,9 @@ define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind readnone { entry: ; CHECK: t1: -; CHECK: muls [[REG:(r[0-9]+)]], r2, r3 -; CHECK-NEXT: mul [[REG2:(r[0-9]+)]], r0, r1 -; CHECK-NEXT: muls r0, [[REG2]], [[REG]] +; CHECK: muls [[REG:(r[0-9]+)]], r3, r2 +; CHECK-NEXT: mul [[REG2:(r[0-9]+)]], r1, r0 +; CHECK-NEXT: muls r0, [[REG]], [[REG2]] %0 = mul nsw i32 %a, %b %1 = mul nsw i32 %c, %d %2 = mul nsw i32 %0, %1 |
