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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-06-28 20:25:50 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2017-06-28 20:25:50 +0000 |
| commit | a45584bebebc5ebe999c0a1672687d2a8cca505b (patch) | |
| tree | 2bcc194f9f69e928321a6fa0ff886d83f14fba6e /llvm/test/CodeGen/AMDGPU | |
| parent | 57f57262c519be373526f81ffc1d1d7caf3c9ad1 (diff) | |
| download | bcm5719-llvm-a45584bebebc5ebe999c0a1672687d2a8cca505b.tar.gz bcm5719-llvm-a45584bebebc5ebe999c0a1672687d2a8cca505b.zip | |
Fold fneg and fabs like multiplications
Given no NaNs and no signed zeroes it folds:
(fmul X, (select (fcmp X > 0.0), -1.0, 1.0)) -> (fneg (fabs X))
(fmul X, (select (fcmp X > 0.0), 1.0, -1.0)) -> (fabs X)
Differential Revision: https://reviews.llvm.org/D34579
llvm-svn: 306592
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll b/llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll new file mode 100644 index 00000000000..3637722d004 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll @@ -0,0 +1,37 @@ +; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s + +; GCN-LABEL: {{^}}fold_mul_neg: +; GCN: load_dword [[V:v[0-9]+]] +; GCN: v_or_b32_e32 [[NEG:v[0-9]]], 0x80000000, [[V]] +; GCN: store_dword [[NEG]] + +define amdgpu_kernel void @fold_mul_neg(float addrspace(1)* %arg) { + %tid = tail call i32 @llvm.amdgcn.workitem.id.x() + %gep = getelementptr inbounds float, float addrspace(1)* %arg, i32 %tid + %v = load float, float addrspace(1)* %gep, align 4 + %cmp = fcmp fast ogt float %v, 0.000000e+00 + %sel = select i1 %cmp, float -1.000000e+00, float 1.000000e+00 + %mul = fmul fast float %v, %sel + store float %mul, float addrspace(1)* %gep, align 4 + ret void +} + +; GCN-LABEL: {{^}}fold_mul_abs: +; GCN: load_dword [[V:v[0-9]+]] +; GCN: v_and_b32_e32 [[ABS:v[0-9]]], 0x7fffffff, [[V]] +; GCN: store_dword [[ABS]] + +define amdgpu_kernel void @fold_mul_abs(float addrspace(1)* %arg) { + %tid = tail call i32 @llvm.amdgcn.workitem.id.x() + %gep = getelementptr inbounds float, float addrspace(1)* %arg, i32 %tid + %v = load float, float addrspace(1)* %gep, align 4 + %cmp = fcmp fast olt float %v, 0.000000e+00 + %sel = select i1 %cmp, float -1.000000e+00, float 1.000000e+00 + %mul = fmul fast float %v, %sel + store float %mul, float addrspace(1)* %gep, align 4 + ret void +} + +declare i32 @llvm.amdgcn.workitem.id.x() #0 + +attributes #0 = { nounwind readnone speculatable } |

