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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-05-02 16:23:09 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-05-02 16:23:09 +0000 |
| commit | a27007eb4fd0854cc2861c25c082f3cb64d8593e (patch) | |
| tree | de23745d48d036c3929020c0a62c05ca809318bf /llvm/test/CodeGen/AMDGPU | |
| parent | ec41cd2461c642a3f824e8ccfe8ae5b7bc6d621f (diff) | |
| download | bcm5719-llvm-a27007eb4fd0854cc2861c25c082f3cb64d8593e.tar.gz bcm5719-llvm-a27007eb4fd0854cc2861c25c082f3cb64d8593e.zip | |
AMDGPU/SI: Use hazard recognizer to detect DPP hazards
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18603
llvm-svn: 268247
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll index 9b477758b81..a85fc7e13fd 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -show-mc-encoding < %s | FileCheck -check-prefix=VI %s +; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -show-mc-encoding < %s | FileCheck -check-prefix=VI -check-prefix=VI-OPT %s +; RUN: llc -O0 -march=amdgcn -mcpu=tonga -verify-machineinstrs -show-mc-encoding < %s | FileCheck -check-prefix=VI -check-prefix=VI-NOOPT %s ; FIXME: The register allocator / scheduler should be able to avoid these hazards. @@ -26,7 +27,10 @@ define void @dpp_wait_states(i32 addrspace(1)* %out, i32 %in) { } ; VI-LABEL: {{^}}dpp_first_in_bb: -; VI: s_nop 1 +; VI: ; %endif +; VI-OPT: s_mov_b32 +; VI-OPT: s_mov_b32 +; VI-NOOPT: s_nop 1 ; VI: v_mov_b32_dpp [[VGPR0:v[0-9]+]], v{{[0-9]+}} quad_perm:[1,0,0,0] row_mask:0x1 bank_mask:0x1 bound_ctrl:0 ; VI: s_nop 1 ; VI: v_mov_b32_dpp [[VGPR1:v[0-9]+]], [[VGPR0]] quad_perm:[1,0,0,0] row_mask:0x1 bank_mask:0x1 bound_ctrl:0 |
