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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-09-11 17:59:21 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-09-11 17:59:21 +0000 |
| commit | 81196a595c681633bd381b56cf40119bb6d2327b (patch) | |
| tree | 77b3c6df2455f54ba63a8ecdd819b731ef818c4a /llvm/test/CodeGen/AMDGPU | |
| parent | b51d5605b1817fdce33c5f30316b0b5a5aef5116 (diff) | |
| download | bcm5719-llvm-81196a595c681633bd381b56cf40119bb6d2327b.tar.gz bcm5719-llvm-81196a595c681633bd381b56cf40119bb6d2327b.zip | |
LiveIntervals: Split live intervals on multiple dead defs
If there are multiple dead defs of the same virtual register, these
are required to be split into multiple virtual registers with separate
live intervals to avoid a verifier error.
llvm-svn: 371640
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir b/llvm/test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir new file mode 100644 index 00000000000..4c402d7be63 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir @@ -0,0 +1,18 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o - %s | FileCheck %s + +# There are multiple dead defs of the same virtual register. Make sure +# the intervals are split during the initial live range computation. + +--- +name: multiple_connected_components_dead +tracksRegLiveness: true +body: | + bb.0: + ; CHECK-LABEL: name: multiple_connected_components_dead + ; CHECK: dead %1:vgpr_32 = V_MOV_B32_e32 0, implicit $exec + ; CHECK: dead %0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec + dead %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec + dead %0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec + +... |
