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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-20 19:28:20 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-20 19:28:20 +0000 |
| commit | 46ffe68d773c1cb91c872cae5adf51b9ea15f180 (patch) | |
| tree | 54b1ee1b2649c23354ea74260ec144b4d5c43628 /llvm/test/CodeGen/AMDGPU | |
| parent | e1143c1322e5f2eec6ca485553dddfad338ea412 (diff) | |
| download | bcm5719-llvm-46ffe68d773c1cb91c872cae5adf51b9ea15f180.tar.gz bcm5719-llvm-46ffe68d773c1cb91c872cae5adf51b9ea15f180.zip | |
AMDGPU/GlobalISel: Really legalize exts from i1
There is a combine that was hiding these tests
not actually testing what they should be, although
they were producing the expected end result.
llvm-svn: 351698
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir | 32 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir | 30 |
2 files changed, 42 insertions, 20 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir index 73f150028c2..b567cadaaf5 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir @@ -49,17 +49,29 @@ body: | ... --- -name: test_anyext_i1_to_s32 +name: test_anyext_s1_to_s32 body: | bb.0.entry: - liveins: $vgpr0 - ; CHECK-LABEL: name: test_anyext_i1_to_s32 - ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 - ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) - ; CHECK: $vgpr0 = COPY [[COPY1]](s32) - %0:_(s32) = COPY $vgpr0 - %1:_(s1) = G_TRUNC %0 - %2:_(s32) = G_ANYEXT %1 - $vgpr0 = COPY %2 + ; CHECK-LABEL: name: test_anyext_s1_to_s32 + ; CHECK: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false + ; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s1) + ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32) + %0:_(s1) = G_CONSTANT i1 0 + %1:_(s32) = G_ANYEXT %0 + $vgpr0 = COPY %1 +... + +--- +name: test_anyext_s1_to_s64 +body: | + bb.0.entry: + + ; CHECK-LABEL: name: test_anyext_s1_to_s64 + ; CHECK: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false + ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[C]](s1) + ; CHECK: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) + %0:_(s1) = G_CONSTANT i1 0 + %1:_(s64) = G_ANYEXT %0 + $vgpr0_vgpr1 = COPY %1 ... diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir index 1761681546f..5794cb52f64 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir @@ -56,16 +56,26 @@ body: | name: test_zext_i1_to_s32 body: | bb.0.entry: - liveins: $vgpr0 ; CHECK-LABEL: name: test_zext_i1_to_s32 - ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 - ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 - ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) - ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] - ; CHECK: $vgpr0 = COPY [[AND]](s32) - %0:_(s32) = COPY $vgpr0 - %1:_(s1) = G_TRUNC %0 - %2:_(s32) = G_ZEXT %1 - $vgpr0 = COPY %2 + ; CHECK: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false + ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[C]](s1) + ; CHECK: $vgpr0 = COPY [[ZEXT]](s32) + %0:_(s1) = G_CONSTANT i1 0 + %1:_(s32) = G_ZEXT %0 + $vgpr0 = COPY %1 +... + +--- +name: test_zext_i1_to_i64 +body: | + bb.0.entry: + + ; CHECK-LABEL: name: test_zext_i1_to_i64 + ; CHECK: [[C:%[0-9]+]]:_(s1) = G_CONSTANT i1 false + ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[C]](s1) + ; CHECK: $vgpr0_vgpr1 = COPY [[ZEXT]](s64) + %0:_(s1) = G_CONSTANT i1 0 + %1:_(s64) = G_ZEXT %0 + $vgpr0_vgpr1 = COPY %1 ... |
