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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-08 23:10:47 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-08 23:10:47 +0000 |
| commit | 2c807410fd37942b5b866eecfc52d7f0126db99f (patch) | |
| tree | 786dd2261e6cdf506682e6deb818fb537ef9e4f0 /llvm/test/CodeGen/AMDGPU | |
| parent | 0e3299dc60f038ab6b7224206adb27aa0582865d (diff) | |
| download | bcm5719-llvm-2c807410fd37942b5b866eecfc52d7f0126db99f.tar.gz bcm5719-llvm-2c807410fd37942b5b866eecfc52d7f0126db99f.zip | |
RegisterCoalescer: Defer clearing implicit_def lanes
We can't go back and recover the lanes if it turns
out the implicit_def really can't be erased.
Assume all lanes are valid if an unresolved conflict
is encountered. There aren't any tests where this
seems to matter either way, but this seems like a
safer option.
Fixes bug 39602
llvm-svn: 350676
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir b/llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir new file mode 100644 index 00000000000..f7a9915a198 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir @@ -0,0 +1,57 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-coalescing -run-pass=simple-register-coalescing -verify-machineinstrs -o - %s | FileCheck %s + +# Bug 39602: Avoid "Couldn't join subrange" error when clearing valid +# lanes on an implicit_def that later cannot be erased. + +--- +name: lost_valid_lanes_maybe_erasable_implicit_def +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: lost_valid_lanes_maybe_erasable_implicit_def + ; CHECK: bb.0: + ; CHECK: successors: %bb.1(0x80000000) + ; CHECK: undef %0.sub1:sreg_64 = IMPLICIT_DEF + ; CHECK: bb.1: + ; CHECK: %0.sub0:sreg_64 = S_MOV_B32 0 + ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY %0 + ; CHECK: dead %0.sub1:sreg_64 = COPY %0.sub0 + ; CHECK: S_ENDPGM implicit [[COPY]].sub1 + bb.0: + successors: %bb.1 + undef %0.sub1:sreg_64 = IMPLICIT_DEF + + bb.1: + %0.sub0:sreg_64 = S_MOV_B32 0 + %1:sreg_64 = COPY %0:sreg_64 + dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64 + S_ENDPGM implicit %1.sub1:sreg_64 + +... +--- +# Same as previous, except with a real value instead of +# IMPLICIT_DEF. These should both be handled the same way. + +name: lost_valid_lanes_real_value +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: lost_valid_lanes_real_value + ; CHECK: bb.0: + ; CHECK: successors: %bb.1(0x80000000) + ; CHECK: undef %0.sub1:sreg_64 = S_MOV_B32 -1 + ; CHECK: bb.1: + ; CHECK: %0.sub0:sreg_64 = S_MOV_B32 0 + ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY %0 + ; CHECK: dead %0.sub1:sreg_64 = COPY %0.sub0 + ; CHECK: S_ENDPGM implicit [[COPY]].sub1 + bb.0: + successors: %bb.1 + undef %0.sub1:sreg_64 = S_MOV_B32 -1 + + bb.1: + %0.sub0:sreg_64 = S_MOV_B32 0 + %1:sreg_64 = COPY %0:sreg_64 + dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64 + S_ENDPGM implicit %1.sub1:sreg_64 + +... |
