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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-01 20:56:21 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-01 20:56:21 +0000 |
| commit | 0529a8e2de9bbf2537bd636279d557a457b5fa65 (patch) | |
| tree | 816beafd6d710e27b8254ebf124eb60236656228 /llvm/test/CodeGen/AMDGPU | |
| parent | c61ff3bef1d87cb7ba37b087e6afea4ac563b5af (diff) | |
| download | bcm5719-llvm-0529a8e2de9bbf2537bd636279d557a457b5fa65.tar.gz bcm5719-llvm-0529a8e2de9bbf2537bd636279d557a457b5fa65.zip | |
AMDGPU/GlobalISel: Mark i32->i64 zext as legal
llvm-svn: 326481
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir new file mode 100644 index 00000000000..1b32d60b9dc --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir @@ -0,0 +1,14 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s + +--- +name: test_zext_i32_to_i64 +body: | + bb.0.entry: + liveins: $vgpr0 + + ; CHECK-LABEL: name: test_zext_i32_to_i64 + ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + %0:_(s32) = COPY $vgpr0 + %1:_(s64) = G_ZEXT %0 +... |
