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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-16 19:09:04 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-16 19:09:04 +0000 |
| commit | b95ddd7ceac7011f456fc576e60d391a6e13c312 (patch) | |
| tree | 23e474daee394ca5270ec8b4df7a953e3b27872f /llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll | |
| parent | eb65cda986c34b9b50a1f0d46d4277cafc05c2a4 (diff) | |
| download | bcm5719-llvm-b95ddd7ceac7011f456fc576e60d391a6e13c312.tar.gz bcm5719-llvm-b95ddd7ceac7011f456fc576e60d391a6e13c312.zip | |
AMDGPU: Remove llvm.AMDGPU.cube intrinsic
llvm-svn: 295359
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll b/llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll index 974823e8b8c..d71f872637b 100644 --- a/llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll +++ b/llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll @@ -586,7 +586,19 @@ IF67: ; preds = %LOOP65 %tmp449 = insertelement <4 x float> %tmp448, float %tmp445, i32 1 %tmp450 = insertelement <4 x float> %tmp449, float %tmp447, i32 2 %tmp451 = insertelement <4 x float> %tmp450, float %tmp194, i32 3 - %tmp452 = call <4 x float> @llvm.AMDGPU.cube(<4 x float> %tmp451) + + %tmp451.x = extractelement <4 x float> %tmp451, i32 0 + %tmp451.y = extractelement <4 x float> %tmp451, i32 1 + %tmp451.z = extractelement <4 x float> %tmp451, i32 2 + %cubetc = call float @llvm.amdgcn.cubetc(float %tmp451.x, float %tmp451.y, float %tmp451.z) + %cubesc = call float @llvm.amdgcn.cubesc(float %tmp451.x, float %tmp451.y, float %tmp451.z) + %cubema = call float @llvm.amdgcn.cubema(float %tmp451.x, float %tmp451.y, float %tmp451.z) + %cubeid = call float @llvm.amdgcn.cubeid(float %tmp451.x, float %tmp451.y, float %tmp451.z) + %tmp452.0 = insertelement <4 x float> undef, float %cubetc, i32 0 + %tmp452.1 = insertelement <4 x float> %tmp452.0, float %cubesc, i32 1 + %tmp452.2 = insertelement <4 x float> %tmp452.1, float %cubema, i32 2 + %tmp452 = insertelement <4 x float> %tmp452.2, float %cubeid, i32 3 + %tmp453 = extractelement <4 x float> %tmp452, i32 0 %tmp454 = extractelement <4 x float> %tmp452, i32 1 %tmp455 = extractelement <4 x float> %tmp452, i32 2 @@ -1841,9 +1853,6 @@ declare float @llvm.amdgcn.rsq.f32(float) #0 declare <4 x float> @llvm.SI.image.sample.d.v8i32(<8 x i32>, <8 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32) #0 ; Function Attrs: nounwind readnone -declare <4 x float> @llvm.AMDGPU.cube(<4 x float>) #0 - -; Function Attrs: nounwind readnone declare float @llvm.fabs.f32(float) #0 ; Function Attrs: nounwind readnone @@ -1863,6 +1872,11 @@ declare float @llvm.amdgcn.interp.p1(float, i32, i32, i32) #0 ; Function Attrs: nounwind readnone declare float @llvm.amdgcn.interp.p2(float, float, i32, i32, i32) #0 +declare float @llvm.amdgcn.cubeid(float, float, float) #0 +declare float @llvm.amdgcn.cubesc(float, float, float) #0 +declare float @llvm.amdgcn.cubetc(float, float, float) #0 +declare float @llvm.amdgcn.cubema(float, float, float) #0 + attributes #0 = { nounwind readnone } attributes #1 = { nounwind } |
