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| author | Mark Searles <m.c.searles@gmail.com> | 2017-06-02 14:19:25 +0000 |
|---|---|---|
| committer | Mark Searles <m.c.searles@gmail.com> | 2017-06-02 14:19:25 +0000 |
| commit | 70359ac60d24bb3d68256da063219ee50bb70f01 (patch) | |
| tree | 2ba5c38eb9d690b55bdd83adc243d270ea2ac4d0 /llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | |
| parent | 2aae0649a1ecf5b64db844d9f4b2e5ef6d45c63d (diff) | |
| download | bcm5719-llvm-70359ac60d24bb3d68256da063219ee50bb70f01.tar.gz bcm5719-llvm-70359ac60d24bb3d68256da063219ee50bb70f01.zip | |
[AMDGPU] Turn on the new waitcnt insertion pass. Adjust tests.
-enable-si-insert-waitcnts=1 becomes the default
-enable-si-insert-waitcnts=0 to use old pass
Differential Revision: https://reviews.llvm.org/D33730
llvm-svn: 304551
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/branch-condition-and.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/branch-condition-and.ll b/llvm/test/CodeGen/AMDGPU/branch-condition-and.ll index 68b77ea3490..662ea37a2b9 100644 --- a/llvm/test/CodeGen/AMDGPU/branch-condition-and.ll +++ b/llvm/test/CodeGen/AMDGPU/branch-condition-and.ll @@ -19,9 +19,8 @@ ; GCN-NEXT: BB{{[0-9]+_[0-9]+}}: ; %bb4 ; GCN: ds_write_b32 -; GCN: s_waitcnt -; GCN-NEXT: [[BB5]] +; GCN: [[BB5]] ; GCN: s_or_b64 exec, exec ; GCN-NEXT: s_endpgm ; GCN-NEXT: .Lfunc_end |
