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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2017-06-02 14:14:21 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2017-06-02 14:14:21 +0000 |
| commit | 2aae0649a1ecf5b64db844d9f4b2e5ef6d45c63d (patch) | |
| tree | 48b475bfb2dd47e565e46286db883b5182956098 /llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | |
| parent | 066e8b56a0e5689e19b9e92134a59c60f6c16b61 (diff) | |
| download | bcm5719-llvm-2aae0649a1ecf5b64db844d9f4b2e5ef6d45c63d.tar.gz bcm5719-llvm-2aae0649a1ecf5b64db844d9f4b2e5ef6d45c63d.zip | |
[mips][microMIPS] Extending size reduction pass with LBU16, LHU16, SB16 and SH16
Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
The following instructions are examined and transformed, if possible:
LBU instruction is transformed into 16-bit instruction LBU16
LHU instruction is transformed into 16-bit instruction LHU16
SB instruction is transformed into 16-bit instruction SB16
SH instruction is transformed into 16-bit instruction SH16
Differential Revision: https://reviews.llvm.org/D33091
llvm-svn: 304550
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/branch-condition-and.ll')
0 files changed, 0 insertions, 0 deletions
