[mips][microMIPS] Extending size reduction pass with LBU16, LHU16, SB16 and SH16

Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
The following instructions are examined and transformed, if possible:
LBU instruction is transformed into 16-bit instruction LBU16
LHU instruction is transformed into 16-bit instruction LHU16
SB instruction is transformed into 16-bit instruction SB16
SH instruction is transformed into 16-bit instruction SH16
Differential Revision: https://reviews.llvm.org/D33091

llvm-svn: 304550

1 files changed, 40 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-lbu16-lhu16-sb16-sh16.ll b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-lbu16-lhu16-sb16-sh16.ll
new file mode 100644
index 00000000000..804ea1e5c43
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-lbu16-lhu16-sb16-sh16.ll
@@ -0,0 +1,40 @@
+; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs < %s | FileCheck %s
+
+define void @f1(i8* %p) {
+entry:
+; CHECK-LABEL: f1:
+; CHECK: lbu16
+; CHECK: sb16
+  %0 = load i8, i8* %p, align 4
+  %a = zext i8 %0 to i32
+  %and = and i32 %a, 1
+  %cmp = icmp eq i32 %and, 0
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+  store i8 0, i8* %p, align 1
+  br label %if.end
+
+if.end:
+  ret void
+}
+
+define void @f2(i16* %p) {
+entry:
+; CHECK-LABEL: f2:
+; CHECK: lhu16
+; CHECK: sh16
+  %0 = load i16, i16* %p, align 2
+  %a = zext i16 %0 to i32
+  %and = and i32 %a, 2
+  %cmp = icmp eq i32 %and, 0
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+  store i16 0, i16* %p, align 2
+  br label %if.end
+
+if.end:
+  ret void
+}
+