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| author | Yi Jiang <yjiang@apple.com> | 2015-06-18 22:34:09 +0000 |
|---|---|---|
| committer | Yi Jiang <yjiang@apple.com> | 2015-06-18 22:34:09 +0000 |
| commit | e0b3499db7cf9d26bc774be7d3e1175bac7665e0 (patch) | |
| tree | d44eec82e4c59818ae07981a6ff1c5a44b5600a3 /llvm/test/CodeGen/AArch64 | |
| parent | 67d492a544164c75004f9a5a64a0501cc0ce71ad (diff) | |
| download | bcm5719-llvm-e0b3499db7cf9d26bc774be7d3e1175bac7665e0.tar.gz bcm5719-llvm-e0b3499db7cf9d26bc774be7d3e1175bac7665e0.zip | |
Avoid redundant select node in early if-conversion pass
llvm-svn: 240072
Diffstat (limited to 'llvm/test/CodeGen/AArch64')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/ifcvt-select.ll | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/ifcvt-select.ll b/llvm/test/CodeGen/AArch64/ifcvt-select.ll new file mode 100644 index 00000000000..4e024d963f2 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/ifcvt-select.ll @@ -0,0 +1,41 @@ +; RUN: llc -mtriple=arm64-apple-ios -mcpu=cyclone < %s | FileCheck %s +; Do not generate redundant select in early if-converstion pass. + +define i32 @foo(i32 %a, i32 %b) { +entry: +;CHECK-LABEL: foo: +;CHECK: csinc +;CHECK-NOT: csel + %sub = sub nsw i32 %b, %a + %cmp10 = icmp sgt i32 %a, 0 + br i1 %cmp10, label %while.body.lr.ph, label %while.end + +while.body.lr.ph: + br label %while.body + +while.body: + %j.012 = phi i32 [ %sub, %while.body.lr.ph ], [ %inc, %if.then ], [ %inc, %if.else ] + %i.011 = phi i32 [ %a, %while.body.lr.ph ], [ %inc2, %if.then ], [ %dec, %if.else ] + %cmp1 = icmp slt i32 %i.011, %j.012 + br i1 %cmp1, label %while.end, label %while.cond + +while.cond: + %inc = add nsw i32 %j.012, 5 + %cmp2 = icmp slt i32 %inc, %b + br i1 %cmp2, label %if.then, label %if.else + +if.then: + %inc2 = add nsw i32 %i.011, 1 + br label %while.body + +if.else: + %dec = add nsw i32 %i.011, -1 + br label %while.body + +while.end: + %j.0.lcssa = phi i32 [ %j.012, %while.body ], [ %sub, %entry ] + %i.0.lcssa = phi i32 [ %i.011, %while.body ], [ %a, %entry ] + %add = add nsw i32 %j.0.lcssa, %i.0.lcssa + ret i32 %add +} + |

