[GlobalISel][AArch64] Add G_FCEIL to isPreISelGenericFloatingPointOpcode

If you don't do this, then if you hit a G_LOAD in getInstrMapping, you'll end
up with GPRs on the G_FCEIL instead of FPRs. This causes a fallback.

Add it to the switch, and add a test verifying that this happens.

llvm-svn: 349822

1 files changed, 16 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/regbank-ceil.ll b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-ceil.ll
new file mode 100644
index 00000000000..b7bc230fb47
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/regbank-ceil.ll
@@ -0,0 +1,16 @@
+; RUN: llc -O=0 -verify-machineinstrs -mtriple aarch64--- \
+; RUN: -stop-before=instruction-select -global-isel %s -o - | FileCheck %s
+
+; Make sure that we choose a FPR for the G_FCEIL and G_LOAD instead of a GPR.
+
+declare float @llvm.ceil.f32(float)
+
+; CHECK-LABEL: name:            foo
+define float @foo(float) {
+  store float %0, float* undef, align 4
+  ; CHECK: %2:fpr(s32) = G_LOAD %1(p0)
+  ; CHECK-NEXT: %3:fpr(s32) = G_FCEIL %2
+  %2 = load float, float* undef, align 4
+  %3 = call float @llvm.ceil.f32(float %2)
+  ret float %3
+}