[globalisel][combine] Improve the truncate placement for the extending-loads combine

This brings the extending loads patch back to the original intent but minus the
PHI bug and with another small improvement to de-dupe truncates that are
inserted into the same block.

The truncates are sunk to their uses unless this would require inserting before a
phi in which case it sinks to the _beginning_ of the predecessor block for that
path (but no earlier than the def).

The reason for choosing the beginning of the predecessor is that it makes de-duping
multiple truncates in the same block simple, and optimized code is going to run a
scheduler at some point which will likely change the position anyway.

llvm-svn: 343804

2 files changed, 67 insertions, 5 deletions

diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
index 7b9243492f5..aaa4bfb054a 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir
@@ -3,6 +3,7 @@
 --- |
   target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
   target triple = "aarch64--"
+
   define void @multiple_copies(i8* %addr) {
   entry:
     br i1 0, label %if, label %else
@@ -14,7 +15,7 @@
     ret void
   }
 
-  define void @sink_to_phi(i8* %addr) {
+  define void @sink_to_phi_trivially_dominating(i8* %addr) {
   entry:
     br i1 0, label %if, label %exit
   if:
@@ -22,6 +23,18 @@
   exit:
     ret void
   }
+
+  define void @sink_to_phi_nondominating(i8* %addr) {
+  entry:
+    br i1 0, label %if, label %else
+  if:
+    br label %exit
+  else:
+    br label %exit
+  exit:
+    ret void
+  }
+
 ...
 
 ---
@@ -70,8 +83,8 @@ body: |
 ...
 
 ---
-name:            sink_to_phi
-# CHECK-LABEL: name: sink_to_phi
+name:            sink_to_phi_trivially_dominating
+# CHECK-LABEL: name: sink_to_phi_trivially_dominating
 # This test currently tests that we don't sink if we would sink to a phi. This
 # is needed to avoid inserting into the middle of the leading G_PHI instructions
 # of a BB
@@ -109,3 +122,53 @@ body: |
     $w0 = COPY %3
     $w1 = COPY %9
 ...
+
+---
+name:            sink_to_phi_nondominating
+# CHECK-LABEL: name: sink_to_phi_nondominating
+# This test currently tests that we don't sink if we would sink to a phi. This
+# is needed to avoid inserting into the middle of the leading G_PHI instructions
+# of a BB
+tracksRegLiveness: true
+body: |
+  bb.0.entry:
+    liveins: $x0, $w1
+    successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)
+    ; CHECK: [[T0:%[0-9]+]]:_(s32) = G_SEXTLOAD
+    %0:_(p0) = COPY $x0
+    %1:_(s32) = COPY $w1
+    %2:_(s8) = G_LOAD %0 :: (load 1 from %ir.addr)
+    %3:_(s32) = G_SEXT %2
+    %4:_(s32) = G_CONSTANT i32 1
+    %5:_(s1) = G_ICMP intpred(ne), %1:_(s32), %4:_
+    G_BRCOND %5:_(s1), %bb.1
+    G_BR %bb.2.else
+  bb.1.if:
+  ; CHECK: bb.1.if:
+    successors: %bb.3(0x80000000)
+    %10:_(s8) = G_CONSTANT i8 1
+    ; CHECK: [[T1:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
+    %6:_(s8) = G_ADD %2, %10
+    ; CHECK: [[T2:%[0-9]+]]:_(s8) = G_ADD [[T1]], {{.*}}
+    G_BR %bb.3.exit
+  bb.2.else:
+  ; CHECK: bb.2.else:
+    successors: %bb.3(0x80000000)
+    %11:_(s8) = G_CONSTANT i8 1
+    ; CHECK: [[T3:%[0-9]+]]:_(s8) = G_TRUNC [[T0]](s32)
+    %7:_(s8) = G_SUB %2, %11
+    ; CHECK: [[T4:%[0-9]+]]:_(s8) = G_SUB [[T3]], {{.*}}
+    G_BR %bb.3.exit
+  bb.3.exit:
+  ; CHECK: bb.3.exit:
+    %8:_(s8) = G_PHI %6:_(s8), %bb.1, %7:_(s8), %bb.2
+    ; CHECK: [[T5:%[0-9]+]]:_(s8) = G_PHI [[T2]](s8), %bb.1, [[T4]](s8)
+    %9:_(s32) = G_ZEXT %8
+    ; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
+    ; CHECK: $w0 = COPY [[T0]](s32)
+    ; CHECK: $w1 = COPY [[T6]](s32)
+    $w0 = COPY %3
+    $w1 = COPY %9
+...
+
+
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir
index 5f1d9142ea8..47d7156789f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir
@@ -288,8 +288,7 @@ body: |
     ; CHECK: [[T1:%[0-9]+]]:_(s64) = G_SEXTLOAD [[T0]](p0) :: (load 1 from %ir.addr)
     ; CHECK: [[T2:%[0-9]+]]:_(s8) = G_TRUNC [[T1]]
     ; CHECK: [[T3:%[0-9]+]]:_(s32) = G_ANYEXT [[T2]]
-    ; CHECK: [[T4:%[0-9]+]]:_(s8) = G_TRUNC [[T1]]
-    ; CHECK: [[T5:%[0-9]+]]:_(s32) = G_ANYEXT [[T4]]
+    ; CHECK: [[T5:%[0-9]+]]:_(s32) = G_ANYEXT [[T2]]
     ; CHECK: $w0 = COPY [[T3]](s32)
     ; CHECK: $x1 = COPY [[T1]](s64)
     ; CHECK: $w2 = COPY [[T5]](s32)