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authorTim Northover <tnorthover@apple.com>2016-08-25 17:37:32 +0000
committerTim Northover <tnorthover@apple.com>2016-08-25 17:37:32 +0000
commit438c77ca1adf6ea29d25f5c53336dacff5ac5a21 (patch)
tree57bf2922a37cd74ee96e67eb31b9081ff3a7fe61 /llvm/test/CodeGen/AArch64
parent2c4a838e241fa078b24811d81bfe87513d40d903 (diff)
downloadbcm5719-llvm-438c77ca1adf6ea29d25f5c53336dacff5ac5a21.tar.gz
bcm5719-llvm-438c77ca1adf6ea29d25f5c53336dacff5ac5a21.zip
GlobalISel: perform multi-step legalization
llvm-svn: 279758
Diffstat (limited to 'llvm/test/CodeGen/AArch64')
-rw-r--r--llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir3
-rw-r--r--llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir6
2 files changed, 8 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
index 2184eb3ebc2..924f758e58e 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
@@ -29,7 +29,8 @@ body: |
; CHECK-LABEL: name: test_scalar_add_big
; CHECK-DAG: [[LHS_LO:%.*]](64), [[LHS_HI:%.*]](64) = G_EXTRACT { s64, s64, s128 } %0, 0, 64
; CHECK-DAG: [[RHS_LO:%.*]](64), [[RHS_HI:%.*]](64) = G_EXTRACT { s64, s64, s128 } %1, 0, 64
- ; CHECK-DAG: [[CARRY0:%.*]](1) = G_CONSTANT s1 0
+ ; CHECK-DAG: [[CARRY0_32:%.*]](32) = G_CONSTANT s32 0
+ ; CHECK-DAG: [[CARRY0:%[0-9]+]](1) = G_TRUNC { s1, s32 } [[CARRY0_32]]
; CHECK: [[RES_LO:%.*]](64), [[CARRY:%.*]](1) = G_UADDE s64 [[LHS_LO]], [[RHS_LO]], [[CARRY0]]
; CHECK: [[RES_HI:%.*]](64), {{%.*}}(1) = G_UADDE s64 [[LHS_HI]], [[RHS_HI]], [[CARRY]]
; CHECK: %2(128) = G_SEQUENCE { s128, s64, s64 } [[RES_LO]], 0, [[RES_HI]], 64
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
index d2be05a7849..a73e5caf26d 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
@@ -20,6 +20,7 @@ registers:
- { id: 5, class: _ }
- { id: 6, class: _ }
- { id: 7, class: _ }
+ - { id: 8, class: _ }
body: |
bb.0.entry:
liveins: %x0, %x1, %x2, %x3
@@ -48,4 +49,9 @@ body: |
; CHECK: %7(32) = G_ICMP { s32, s32 } intpred(sle), [[LHS32]], [[RHS32]]
%7(32) = G_ICMP { s32, s8 } intpred(sle), %2, %3
+ ; CHECK: [[LHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %2
+ ; CHECK: [[RHS32:%[0-9]+]](32) = G_ZEXT { s32, s8 } %3
+ ; CHECK: [[TST32:%[0-9]+]](32) = G_ICMP { s32, s32 } intpred(ult), [[LHS32]], [[RHS32]]
+ ; CHECK: %8(1) = G_TRUNC { s1, s32 } [[TST32]]
+ %8(1) = G_ICMP { s1, s8 } intpred(ult), %2, %3
...
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