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| author | Oliver Stannard <oliver.stannard@arm.com> | 2018-10-08 14:12:08 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2018-10-08 14:12:08 +0000 |
| commit | 367b4741f4954c9d4013ffcbfb48ca2c535fd6d1 (patch) | |
| tree | a6d1f631906bd362e9850540fb753ecab3439ac2 /llvm/test/CodeGen/AArch64 | |
| parent | c922116a5152b80fad932b6a963973ffb6eee76c (diff) | |
| download | bcm5719-llvm-367b4741f4954c9d4013ffcbfb48ca2c535fd6d1.tar.gz bcm5719-llvm-367b4741f4954c9d4013ffcbfb48ca2c535fd6d1.zip | |
[AArch64][v8.5A] Don't create BR instructions in outliner when BTI enabled
When branch target identification is enabled, we can only do indirect
tail-calls through x16 or x17. This means that the outliner can't
transform a BLR instruction at the end of an outlined region into a BR.
Differential revision: https://reviews.llvm.org/D52869
llvm-svn: 343969
Diffstat (limited to 'llvm/test/CodeGen/AArch64')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/machine-outliner-bti.mir | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-bti.mir b/llvm/test/CodeGen/AArch64/machine-outliner-bti.mir new file mode 100644 index 00000000000..d15657ee499 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/machine-outliner-bti.mir @@ -0,0 +1,44 @@ +# RUN: llc -mtriple=aarch64--- -run-pass=prologepilog -run-pass=machine-outliner -verify-machineinstrs %s -o - | FileCheck %s + +# AArch64 Branch Target Enforcement treats the BR and BLR indirect branch +# instructions differently. The BLR instruction can only target a BTI C +# instruction, and the BR instruction can only target a BTI J instruction. We +# always start indirectly-called functions with BTI C, so the outliner must not +# transform a BLR instruction into a BR instruction. + +# There is an exception to this: BR X16 and BR X17 can also target a BTI C +# instruction. We make of this for general tail-calls (tested elsewhere), but +# don't currently make use of this in the outliner. + +# CHECK-NOT: OUTLINED_FUNCTION_ + +--- | + @g = hidden local_unnamed_addr global i32 0, align 4 + + define hidden void @bar(void ()* nocapture %f) "branch-target-enforcement" { + entry: + ret void + } + + declare void @foo() +... +--- +name: bar +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $x20, $x21, $lr, $x19 + + HINT 34 + + STRWui renamable $w21, renamable $x20, target-flags(aarch64-pageoff, aarch64-nc) @g :: (store 4 into @g) + BLR renamable $x19, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp + + STRWui renamable $w21, renamable $x20, target-flags(aarch64-pageoff, aarch64-nc) @g :: (store 4 into @g) + BLR renamable $x19, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp + + STRWui killed renamable $w21, killed renamable $x20, target-flags(aarch64-pageoff, aarch64-nc) @g :: (store 4 into @g) + BLR killed renamable $x19, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp + + TCRETURNdi @foo, 0, csr_aarch64_aapcs, implicit $sp +... |

