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| author | Luke Cheeseman <luke.cheeseman@arm.com> | 2018-09-28 13:37:27 +0000 |
|---|---|---|
| committer | Luke Cheeseman <luke.cheeseman@arm.com> | 2018-09-28 13:37:27 +0000 |
| commit | 21f2955bb289bffe61f68a8b0726bbec24216214 (patch) | |
| tree | 52c28c512e6e2b5d6119c11204dec73f41e5f36e /llvm/test/CodeGen/AArch64 | |
| parent | 66f4e45b35c809ff81b81044260a520e041a7d49 (diff) | |
| download | bcm5719-llvm-21f2955bb289bffe61f68a8b0726bbec24216214.tar.gz bcm5719-llvm-21f2955bb289bffe61f68a8b0726bbec24216214.zip | |
Reapply changes reverted by r343235
- Add fix so that all code paths that create DWARFContext
with an ObjectFile initialise the target architecture in the context
- Add an assert that the Arch is known in the Dwarf CallFrameString method
llvm-svn: 343317
Diffstat (limited to 'llvm/test/CodeGen/AArch64')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/sign-return-address.ll | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address.ll b/llvm/test/CodeGen/AArch64/sign-return-address.ll index a0c73058a30..6515dcaf773 100644 --- a/llvm/test/CodeGen/AArch64/sign-return-address.ll +++ b/llvm/test/CodeGen/AArch64/sign-return-address.ll @@ -24,17 +24,17 @@ define i32 @leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { ; CHECK-LABEL: @leaf_sign_all ; CHECK: paciasp ; CHECK: autiasp -; CHECK-NEXT: ret +; CHECK: ret define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" { ret i32 %x } ; CHECK: @leaf_clobbers_lr ; CHECK: paciasp -; CHECK-NEXT: str x30, [sp, #-16]! +; CHECK: str x30, [sp, #-16]! ; CHECK: ldr x30, [sp], #16 ; CHECK-NEXT: autiasp -; CHECK-NEXT: ret +; CHECK: ret define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" { call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1 ret i64 %x @@ -45,7 +45,7 @@ declare i32 @foo(i32) ; CHECK: @non_leaf_sign_all ; CHECK: paciasp ; CHECK: autiasp -; CHECK-NEXT: ret +; CHECK: ret define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { %call = call i32 @foo(i32 %x) ret i32 %call @@ -53,10 +53,10 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" { ; CHECK: @non_leaf_sign_non_leaf ; CHECK: paciasp -; CHECK-NEXT: str x30, [sp, #-16]! +; CHECK: str x30, [sp, #-16]! ; CHECK: ldr x30, [sp], #16 -; CHECK-NEXT: autiasp -; CHECK-NEXT: ret +; CHECK: autiasp +; CHECK: ret define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { %call = call i32 @foo(i32 %x) ret i32 %call @@ -65,7 +65,7 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" { ; CHECK-LABEL: @leaf_sign_all_v83 ; CHECK: paciasp ; CHECK-NOT: ret -; CHECK-NEXT: retaa +; CHECK: retaa ; CHECK-NOT: ret define i32 @leaf_sign_all_v83(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" { ret i32 %x @@ -75,10 +75,10 @@ declare fastcc i64 @bar(i64) ; CHECK-LABEL: @spill_lr_and_tail_call ; CHECK: paciasp -; CHECK-NEXT: str x30, [sp, #-16]! +; CHECK: str x30, [sp, #-16]! ; CHECK: ldr x30, [sp], #16 -; CHECK-NEXT: autiasp -; CHECK-NEXT: b bar +; CHECK: autiasp +; CHECK: b bar define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" { call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1 tail call fastcc i64 @bar(i64 %x) |
