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| author | Aditya Nandakumar <aditya_nandakumar@apple.com> | 2017-05-04 21:43:12 +0000 |
|---|---|---|
| committer | Aditya Nandakumar <aditya_nandakumar@apple.com> | 2017-05-04 21:43:12 +0000 |
| commit | 117b667bd9d36ae751909ac93bf2e590de26b69c (patch) | |
| tree | b24cd090162ba0867f3aaa3360c5f2163dc7137e /llvm/test/CodeGen/AArch64 | |
| parent | 7f3190118b8b9b2b43befb382cb0dc6bf5cc2990 (diff) | |
| download | bcm5719-llvm-117b667bd9d36ae751909ac93bf2e590de26b69c.tar.gz bcm5719-llvm-117b667bd9d36ae751909ac93bf2e590de26b69c.zip | |
[GISel]: Add support to translate ConstantVectors
Reviewed by Quentin
https://reviews.llvm.org/D32814
llvm-svn: 302196
Diffstat (limited to 'llvm/test/CodeGen/AArch64')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index 02848021dbc..ac3d4b17f73 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -1541,3 +1541,12 @@ define <16 x i8> @test_shufflevector_v8s8_v16s8(<8 x i8> %arg1, <8 x i8> %arg2) %res = shufflevector <8 x i8> %arg1, <8 x i8> %arg2, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> ret <16 x i8> %res } + +; CHECK-LABEL: test_constant_vector +; CHECK: [[UNDEF:%[0-9]+]](s16) = IMPLICIT_DEF +; CHECK: [[F:%[0-9]+]](s16) = G_FCONSTANT half 0xH3C00 +; CHECK: [[M:%[0-9]+]](<4 x s16>) = G_MERGE_VALUES [[UNDEF]](s16), [[UNDEF]](s16), [[UNDEF]](s16), [[F]](s16) +; CHECK: %d0 = COPY [[M]](<4 x s16>) +define <4 x half> @test_constant_vector() { + ret <4 x half> <half undef, half undef, half undef, half 0xH3C00> +} |
