diff options
| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-13 13:15:59 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-13 13:15:59 +0000 |
| commit | c171f65a87782f7db101285b9e9905e25abe0d82 (patch) | |
| tree | ab16efdc054c90545d407447c743621d0d0f3e08 /llvm/test/Bitcode/memInstructions.3.2.ll | |
| parent | af8b32e1766e9731027d9adb7a9195d356258704 (diff) | |
| download | bcm5719-llvm-c171f65a87782f7db101285b9e9905e25abe0d82.tar.gz bcm5719-llvm-c171f65a87782f7db101285b9e9905e25abe0d82.zip | |
[mips] Add cache and pref instructions
Summary:
cache and pref were added in MIPS-III, and MIPS32 but were re-encoded in
MIPS32r6/MIPS64r6 to use a 9-bit offset rather than the 16-bit offset
available to earlier cores.
Resolved the decoding conflict between pref and lwc3.
Depends on D4115
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4116
llvm-svn: 210900
Diffstat (limited to 'llvm/test/Bitcode/memInstructions.3.2.ll')
0 files changed, 0 insertions, 0 deletions
