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| author | Marina Yatsina <marina.yatsina@intel.com> | 2016-08-17 11:40:21 +0000 |
|---|---|---|
| committer | Marina Yatsina <marina.yatsina@intel.com> | 2016-08-17 11:40:21 +0000 |
| commit | 4b22642e6fb0bceadce788637866456c5c80034e (patch) | |
| tree | 0c3b86577a0120128418dac9d9ccce5ecd58da13 /llvm/test/Bitcode/bitwiseInstructions.3.2.ll | |
| parent | ab37264aa76b7eddb0a491854ac7d0de1fe570f6 (diff) | |
| download | bcm5719-llvm-4b22642e6fb0bceadce788637866456c5c80034e.tar.gz bcm5719-llvm-4b22642e6fb0bceadce788637866456c5c80034e.zip | |
Fixing bug committed in rev. 278321
In theory the indices of RC (and thus the index used for LiveRegs) may differ from the indices of OpRC.
Fixed the code to extract the correct RC index.
OpRC contains the first X consecutive elements of RC, and thus their indices are currently de facto the same, therefore a test cannot be added at this point.
Differential Revision: https://reviews.llvm.org/D23491
llvm-svn: 278923
Diffstat (limited to 'llvm/test/Bitcode/bitwiseInstructions.3.2.ll')
0 files changed, 0 insertions, 0 deletions
