summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorMarina Yatsina <marina.yatsina@intel.com>2016-08-17 11:40:21 +0000
committerMarina Yatsina <marina.yatsina@intel.com>2016-08-17 11:40:21 +0000
commit4b22642e6fb0bceadce788637866456c5c80034e (patch)
tree0c3b86577a0120128418dac9d9ccce5ecd58da13
parentab37264aa76b7eddb0a491854ac7d0de1fe570f6 (diff)
downloadbcm5719-llvm-4b22642e6fb0bceadce788637866456c5c80034e.tar.gz
bcm5719-llvm-4b22642e6fb0bceadce788637866456c5c80034e.zip
Fixing bug committed in rev. 278321
In theory the indices of RC (and thus the index used for LiveRegs) may differ from the indices of OpRC. Fixed the code to extract the correct RC index. OpRC contains the first X consecutive elements of RC, and thus their indices are currently de facto the same, therefore a test cannot be added at this point. Differential Revision: https://reviews.llvm.org/D23491 llvm-svn: 278923
-rw-r--r--llvm/include/llvm/Target/TargetRegisterInfo.h6
-rw-r--r--llvm/lib/CodeGen/ExecutionDepsFix.cpp9
2 files changed, 12 insertions, 3 deletions
diff --git a/llvm/include/llvm/Target/TargetRegisterInfo.h b/llvm/include/llvm/Target/TargetRegisterInfo.h
index e5a6c8ed2f2..e5642493928 100644
--- a/llvm/include/llvm/Target/TargetRegisterInfo.h
+++ b/llvm/include/llvm/Target/TargetRegisterInfo.h
@@ -17,6 +17,7 @@
#define LLVM_TARGET_TARGETREGISTERINFO_H
#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/IR/CallingConv.h"
@@ -86,6 +87,11 @@ public:
/// Return the number of registers in this class.
unsigned getNumRegs() const { return MC->getNumRegs(); }
+
+ iterator_range<SmallVectorImpl<MCPhysReg>::const_iterator>
+ getRegisters() const {
+ return make_range(MC->begin(), MC->end());
+ }
/// Return the specified register in the class.
unsigned getRegister(unsigned i) const {
diff --git a/llvm/lib/CodeGen/ExecutionDepsFix.cpp b/llvm/lib/CodeGen/ExecutionDepsFix.cpp
index 5f91db9251c..213dd58a31d 100644
--- a/llvm/lib/CodeGen/ExecutionDepsFix.cpp
+++ b/llvm/lib/CodeGen/ExecutionDepsFix.cpp
@@ -509,12 +509,15 @@ void ExeDepsFix::pickBestRegisterForUndef(MachineInstr *MI, unsigned OpIdx,
// max clearance or clearance higher than Pref.
unsigned MaxClearance = 0;
unsigned MaxClearanceReg = OriginalReg;
- for (unsigned rx = 0; rx < OpRC->getNumRegs(); ++rx) {
- unsigned Clearance = CurInstr - LiveRegs[rx].Def;
+ for (auto Reg : OpRC->getRegisters()) {
+ assert(AliasMap[Reg].size() == 1 &&
+ "Reg is expected to be mapped to a single index");
+ int RCrx = *regIndices(Reg).begin();
+ unsigned Clearance = CurInstr - LiveRegs[RCrx].Def;
if (Clearance <= MaxClearance)
continue;
MaxClearance = Clearance;
- MaxClearanceReg = OpRC->getRegister(rx);
+ MaxClearanceReg = Reg;
if (MaxClearance > Pref)
break;
OpenPOWER on IntegriCloud