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| author | Javed Absar <javed.absar@arm.com> | 2015-06-08 15:01:11 +0000 |
|---|---|---|
| committer | Javed Absar <javed.absar@arm.com> | 2015-06-08 15:01:11 +0000 |
| commit | e1c7dc3ee2b52c101d8498e3ddce55b851962605 (patch) | |
| tree | 6b416eb92ff927e84380674e5270470bf2010e79 /llvm/lib | |
| parent | cf197f0bdee1ea4af8cfd3853421de94943f0b1c (diff) | |
| download | bcm5719-llvm-e1c7dc3ee2b52c101d8498e3ddce55b851962605.tar.gz bcm5719-llvm-e1c7dc3ee2b52c101d8498e3ddce55b851962605.zip | |
ARM]: Add support for MMFR4_EL1 in assembler
This patch adds support for system register MMFR4_EL1 (memory model feature register) in the assembler.
This register provides information about the implemented memory model and memory management support.
llvm-svn: 239302
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp index 28b8e7e29fe..ee85b65bf39 100644 --- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp @@ -175,6 +175,7 @@ const AArch64NamedImmMapper::Mapping AArch64SysReg::MRSMapper::MRSMappings[] = { {"id_mmfr1_el1", ID_MMFR1_EL1, {}}, {"id_mmfr2_el1", ID_MMFR2_EL1, {}}, {"id_mmfr3_el1", ID_MMFR3_EL1, {}}, + {"id_mmfr4_el1", ID_MMFR4_EL1, {}}, {"id_isar0_el1", ID_ISAR0_EL1, {}}, {"id_isar1_el1", ID_ISAR1_EL1, {}}, {"id_isar2_el1", ID_ISAR2_EL1, {}}, diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h index 7125f14f1a2..7e42f8e3601 100644 --- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h @@ -603,6 +603,7 @@ namespace AArch64SysReg { ISR_EL1 = 0xc608, // 11 000 1100 0001 000 CNTPCT_EL0 = 0xdf01, // 11 011 1110 0000 001 CNTVCT_EL0 = 0xdf02, // 11 011 1110 0000 010 + ID_MMFR4_EL1 = 0xc016, // 11 000 0000 0010 110 // Trace registers TRCSTATR = 0x8818, // 10 001 0000 0011 000 |
