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authorBenjamin Kramer <benny.kra@googlemail.com>2014-04-29 09:37:54 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2014-04-29 09:37:54 +0000
commite1ab3f062e271d848bce33aa1090c0ea40f298d6 (patch)
tree30ad709a3a33d4fab4123910093ac4091ba2a5d9 /llvm/lib
parentdc8e551d84b8f7f6081a7a97b3b6ffdf935404e7 (diff)
downloadbcm5719-llvm-e1ab3f062e271d848bce33aa1090c0ea40f298d6.tar.gz
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AArch64: Mark vector long multiplication as expand.
There are no patterns for this. This was already fixed for ARM64 but I forgot to apply it to AArch64 too. llvm-svn: 207515
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AArch64/AArch64ISelLowering.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 6a073dbd442..5ad2036d512 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -514,6 +514,11 @@ AArch64TargetLowering::AArch64TargetLowering(AArch64TargetMachine &TM)
> VT1.getVectorElementType().getSizeInBits())
setTruncStoreAction(VT, VT1, Expand);
}
+
+ setOperationAction(ISD::MULHS, VT, Expand);
+ setOperationAction(ISD::SMUL_LOHI, VT, Expand);
+ setOperationAction(ISD::MULHU, VT, Expand);
+ setOperationAction(ISD::UMUL_LOHI, VT, Expand);
}
// There is no v1i64/v2i64 multiply, expand v1i64/v2i64 to GPR i64 multiply.
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