diff options
author | Joerg Sonnenberger <joerg@bec.de> | 2014-07-30 09:24:37 +0000 |
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committer | Joerg Sonnenberger <joerg@bec.de> | 2014-07-30 09:24:37 +0000 |
commit | dda8e784f616390e03c132203685a58dcefea5d7 (patch) | |
tree | fb1c954d3381a34f6c169a930151ba4c848dbc3f /llvm/lib | |
parent | 1b0542ecee9e39a5e5ac04f36dfa7d6a64423143 (diff) | |
download | bcm5719-llvm-dda8e784f616390e03c132203685a58dcefea5d7.tar.gz bcm5719-llvm-dda8e784f616390e03c132203685a58dcefea5d7.zip |
SPRG 0 to 3 are valid outside BookE, so move them to the normal test
file. Add support for accessing SPRG 4 to 7 on BookE.
llvm-svn: 214295
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 16 |
2 files changed, 20 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index a3ba00d7a83..8b342effc67 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -1624,6 +1624,10 @@ unsigned PPCAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp, case MCK_1: ImmVal = 1; break; case MCK_2: ImmVal = 2; break; case MCK_3: ImmVal = 3; break; + case MCK_4: ImmVal = 4; break; + case MCK_5: ImmVal = 5; break; + case MCK_6: ImmVal = 6; break; + case MCK_7: ImmVal = 7; break; default: return Match_InvalidOperand; } diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index 97098514b74..b30fd247952 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -3199,21 +3199,37 @@ def : InstAlias<"mfsprg $RT, 0", (MFSPR gprc:$RT, 272)>; def : InstAlias<"mfsprg $RT, 1", (MFSPR gprc:$RT, 273)>; def : InstAlias<"mfsprg $RT, 2", (MFSPR gprc:$RT, 274)>; def : InstAlias<"mfsprg $RT, 3", (MFSPR gprc:$RT, 275)>; +def : InstAlias<"mfsprg $RT, 4", (MFSPR gprc:$RT, 260)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg $RT, 5", (MFSPR gprc:$RT, 261)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg $RT, 6", (MFSPR gprc:$RT, 262)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg $RT, 7", (MFSPR gprc:$RT, 263)>, Requires<[IsBookE]>; def : InstAlias<"mfsprg0 $RT", (MFSPR gprc:$RT, 272)>; def : InstAlias<"mfsprg1 $RT", (MFSPR gprc:$RT, 273)>; def : InstAlias<"mfsprg2 $RT", (MFSPR gprc:$RT, 274)>; def : InstAlias<"mfsprg3 $RT", (MFSPR gprc:$RT, 275)>; +def : InstAlias<"mfsprg4 $RT", (MFSPR gprc:$RT, 260)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg5 $RT", (MFSPR gprc:$RT, 261)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg6 $RT", (MFSPR gprc:$RT, 262)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg7 $RT", (MFSPR gprc:$RT, 263)>, Requires<[IsBookE]>; def : InstAlias<"mtsprg 0, $RT", (MTSPR 272, gprc:$RT)>; def : InstAlias<"mtsprg 1, $RT", (MTSPR 273, gprc:$RT)>; def : InstAlias<"mtsprg 2, $RT", (MTSPR 274, gprc:$RT)>; def : InstAlias<"mtsprg 3, $RT", (MTSPR 275, gprc:$RT)>; +def : InstAlias<"mtsprg 4, $RT", (MTSPR 260, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg 5, $RT", (MTSPR 261, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg 6, $RT", (MTSPR 262, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg 7, $RT", (MTSPR 263, gprc:$RT)>, Requires<[IsBookE]>; def : InstAlias<"mtsprg0 $RT", (MTSPR 272, gprc:$RT)>; def : InstAlias<"mtsprg1 $RT", (MTSPR 273, gprc:$RT)>; def : InstAlias<"mtsprg2 $RT", (MTSPR 274, gprc:$RT)>; def : InstAlias<"mtsprg3 $RT", (MTSPR 275, gprc:$RT)>; +def : InstAlias<"mtsprg4 $RT", (MTSPR 260, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg5 $RT", (MTSPR 261, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg6 $RT", (MTSPR 262, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg7 $RT", (MTSPR 263, gprc:$RT)>, Requires<[IsBookE]>; def : InstAlias<"mtasr $RS", (MTSPR 280, gprc:$RS)>; |