diff options
| -rw-r--r-- | llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 16 | ||||
| -rw-r--r-- | llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s | 107 | ||||
| -rw-r--r-- | llvm/test/MC/PowerPC/ppc64-encoding-ext.s | 60 |
4 files changed, 140 insertions, 47 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index a3ba00d7a83..8b342effc67 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -1624,6 +1624,10 @@ unsigned PPCAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp, case MCK_1: ImmVal = 1; break; case MCK_2: ImmVal = 2; break; case MCK_3: ImmVal = 3; break; + case MCK_4: ImmVal = 4; break; + case MCK_5: ImmVal = 5; break; + case MCK_6: ImmVal = 6; break; + case MCK_7: ImmVal = 7; break; default: return Match_InvalidOperand; } diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index 97098514b74..b30fd247952 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -3199,21 +3199,37 @@ def : InstAlias<"mfsprg $RT, 0", (MFSPR gprc:$RT, 272)>; def : InstAlias<"mfsprg $RT, 1", (MFSPR gprc:$RT, 273)>; def : InstAlias<"mfsprg $RT, 2", (MFSPR gprc:$RT, 274)>; def : InstAlias<"mfsprg $RT, 3", (MFSPR gprc:$RT, 275)>; +def : InstAlias<"mfsprg $RT, 4", (MFSPR gprc:$RT, 260)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg $RT, 5", (MFSPR gprc:$RT, 261)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg $RT, 6", (MFSPR gprc:$RT, 262)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg $RT, 7", (MFSPR gprc:$RT, 263)>, Requires<[IsBookE]>; def : InstAlias<"mfsprg0 $RT", (MFSPR gprc:$RT, 272)>; def : InstAlias<"mfsprg1 $RT", (MFSPR gprc:$RT, 273)>; def : InstAlias<"mfsprg2 $RT", (MFSPR gprc:$RT, 274)>; def : InstAlias<"mfsprg3 $RT", (MFSPR gprc:$RT, 275)>; +def : InstAlias<"mfsprg4 $RT", (MFSPR gprc:$RT, 260)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg5 $RT", (MFSPR gprc:$RT, 261)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg6 $RT", (MFSPR gprc:$RT, 262)>, Requires<[IsBookE]>; +def : InstAlias<"mfsprg7 $RT", (MFSPR gprc:$RT, 263)>, Requires<[IsBookE]>; def : InstAlias<"mtsprg 0, $RT", (MTSPR 272, gprc:$RT)>; def : InstAlias<"mtsprg 1, $RT", (MTSPR 273, gprc:$RT)>; def : InstAlias<"mtsprg 2, $RT", (MTSPR 274, gprc:$RT)>; def : InstAlias<"mtsprg 3, $RT", (MTSPR 275, gprc:$RT)>; +def : InstAlias<"mtsprg 4, $RT", (MTSPR 260, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg 5, $RT", (MTSPR 261, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg 6, $RT", (MTSPR 262, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg 7, $RT", (MTSPR 263, gprc:$RT)>, Requires<[IsBookE]>; def : InstAlias<"mtsprg0 $RT", (MTSPR 272, gprc:$RT)>; def : InstAlias<"mtsprg1 $RT", (MTSPR 273, gprc:$RT)>; def : InstAlias<"mtsprg2 $RT", (MTSPR 274, gprc:$RT)>; def : InstAlias<"mtsprg3 $RT", (MTSPR 275, gprc:$RT)>; +def : InstAlias<"mtsprg4 $RT", (MTSPR 260, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg5 $RT", (MTSPR 261, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg6 $RT", (MTSPR 262, gprc:$RT)>, Requires<[IsBookE]>; +def : InstAlias<"mtsprg7 $RT", (MTSPR 263, gprc:$RT)>, Requires<[IsBookE]>; def : InstAlias<"mtasr $RS", (MTSPR 280, gprc:$RS)>; diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s b/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s index 88ba88e3872..029b7be79b5 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-bookIII.s @@ -21,53 +21,66 @@ # CHECK-LE: mtmsrd 4, 1 # encoding: [0x64,0x01,0x81,0x7c] mtmsrd %r4, 1 -# CHECK-BE: mfspr 4, 272 # encoding: [0x7c,0x90,0x42,0xa6] -# CHECK-LE: mfspr 4, 272 # encoding: [0xa6,0x42,0x90,0x7c] - mfsprg %r4, 0 - -# CHECK-BE: mfspr 4, 273 # encoding: [0x7c,0x91,0x42,0xa6] -# CHECK-LE: mfspr 4, 273 # encoding: [0xa6,0x42,0x91,0x7c] - mfsprg %r4, 1 - -# CHECK-BE: mfspr 4, 274 # encoding: [0x7c,0x92,0x42,0xa6] -# CHECK-LE: mfspr 4, 274 # encoding: [0xa6,0x42,0x92,0x7c] - mfsprg %r4, 2 - -# CHECK-BE: mfspr 4, 275 # encoding: [0x7c,0x93,0x42,0xa6] -# CHECK-LE: mfspr 4, 275 # encoding: [0xa6,0x42,0x93,0x7c] - mfsprg %r4, 3 - -# CHECK-BE: mtspr 272, 4 # encoding: [0x7c,0x90,0x43,0xa6] -# CHECK-LE: mtspr 272, 4 # encoding: [0xa6,0x43,0x90,0x7c] - mtsprg 0, %r4 - -# CHECK-BE: mtspr 273, 4 # encoding: [0x7c,0x91,0x43,0xa6] -# CHECK-LE: mtspr 273, 4 # encoding: [0xa6,0x43,0x91,0x7c] - mtsprg 1, %r4 - -# CHECK-BE: mtspr 274, 4 # encoding: [0x7c,0x92,0x43,0xa6] -# CHECK-LE: mtspr 274, 4 # encoding: [0xa6,0x43,0x92,0x7c] - mtsprg 2, %r4 - -# CHECK-BE: mtspr 275, 4 # encoding: [0x7c,0x93,0x43,0xa6] -# CHECK-LE: mtspr 275, 4 # encoding: [0xa6,0x43,0x93,0x7c] - mtsprg 3, %r4 - -# CHECK-BE: mtspr 272, 4 # encoding: [0x7c,0x90,0x43,0xa6] -# CHECK-LE: mtspr 272, 4 # encoding: [0xa6,0x43,0x90,0x7c] - mtsprg0 %r4 - -# CHECK-BE: mtspr 273, 4 # encoding: [0x7c,0x91,0x43,0xa6] -# CHECK-LE: mtspr 273, 4 # encoding: [0xa6,0x43,0x91,0x7c] - mtsprg1 %r4 - -# CHECK-BE: mtspr 274, 4 # encoding: [0x7c,0x92,0x43,0xa6] -# CHECK-LE: mtspr 274, 4 # encoding: [0xa6,0x43,0x92,0x7c] - mtsprg2 %r4 - -# CHECK-BE: mtspr 275, 4 # encoding: [0x7c,0x93,0x43,0xa6] -# CHECK-LE: mtspr 275, 4 # encoding: [0xa6,0x43,0x93,0x7c] - mtsprg3 %r4 +# CHECK-BE: mfspr 4, 260 # encoding: [0x7c,0x84,0x42,0xa6] +# CHECK-LE: mfspr 4, 260 # encoding: [0xa6,0x42,0x84,0x7c] + mfsprg %r4, 4 + +# CHECK-BE: mfspr 4, 261 # encoding: [0x7c,0x85,0x42,0xa6] +# CHECK-LE: mfspr 4, 261 # encoding: [0xa6,0x42,0x85,0x7c] + mfsprg %r4, 5 + +# CHECK-BE: mfspr 4, 262 # encoding: [0x7c,0x86,0x42,0xa6] +# CHECK-LE: mfspr 4, 262 # encoding: [0xa6,0x42,0x86,0x7c] + mfsprg %r4, 6 + +# CHECK-BE: mfspr 4, 263 # encoding: [0x7c,0x87,0x42,0xa6] +# CHECK-LE: mfspr 4, 263 # encoding: [0xa6,0x42,0x87,0x7c] + mfsprg %r4, 7 + +# CHECK-BE: mfspr 2, 260 # encoding: [0x7c,0x44,0x42,0xa6] +# CHECK-LE: mfspr 2, 260 # encoding: [0xa6,0x42,0x44,0x7c] + mfsprg4 %r2 +# CHECK-BE: mfspr 2, 261 # encoding: [0x7c,0x45,0x42,0xa6] +# CHECK-LE: mfspr 2, 261 # encoding: [0xa6,0x42,0x45,0x7c] + mfsprg5 %r2 +# CHECK-BE: mfspr 2, 262 # encoding: [0x7c,0x46,0x42,0xa6] +# CHECK-LE: mfspr 2, 262 # encoding: [0xa6,0x42,0x46,0x7c] + mfsprg6 %r2 +# CHECK-BE: mfspr 2, 263 # encoding: [0x7c,0x47,0x42,0xa6] +# CHECK-LE: mfspr 2, 263 # encoding: [0xa6,0x42,0x47,0x7c] + mfsprg7 %r2 + +# NOT-CHECK-BE: mtspr 260, 4 # encoding: [0x7c,0x90,0x43,0xa6] +# NOT-CHECK-LE: mtspr 260, 4 # encoding: [0xa6,0x43,0x90,0x7c] + mtsprg 4, %r4 + +# NOT-CHECK-BE: mtspr 261, 4 # encoding: [0x7c,0x91,0x43,0xa6] +# NOT-CHECK-LE: mtspr 261, 4 # encoding: [0xa6,0x43,0x91,0x7c] + mtsprg 5, %r4 + +# NOT-CHECK-BE: mtspr 262, 4 # encoding: [0x7c,0x92,0x43,0xa6] +# NOT-CHECK-LE: mtspr 262, 4 # encoding: [0xa6,0x43,0x92,0x7c] + mtsprg 6, %r4 + +# NOT-CHECK-BE: mtspr 263, 4 # encoding: [0x7c,0x93,0x43,0xa6] +# NOT-CHECK-LE: mtspr 263, 4 # encoding: [0xa6,0x43,0x93,0x7c] + mtsprg 7, %r4 + +# CHECK-BE: mtspr 260, 4 # encoding: [0x7c,0x84,0x43,0xa6] +# CHECK-LE: mtspr 260, 4 # encoding: [0xa6,0x43,0x84,0x7c] + mtsprg4 %r4 + +# CHECK-BE: mtspr 261, 4 # encoding: [0x7c,0x85,0x43,0xa6] +# CHECK-LE: mtspr 261, 4 # encoding: [0xa6,0x43,0x85,0x7c] + mtsprg5 %r4 + +# CHECK-BE: mtspr 262, 4 # encoding: [0x7c,0x86,0x43,0xa6] +# CHECK-LE: mtspr 262, 4 # encoding: [0xa6,0x43,0x86,0x7c] + mtsprg6 %r4 + +# CHECK-BE: mtspr 263, 4 # encoding: [0x7c,0x87,0x43,0xa6] +# CHECK-LE: mtspr 263, 4 # encoding: [0xa6,0x43,0x87,0x7c] + mtsprg7 %r4 # CHECK-BE: mtspr 280, 4 # encoding: [0x7c,0x98,0x43,0xa6] # CHECK-LE: mtspr 280, 4 # encoding: [0xa6,0x43,0x98,0x7c] diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s index b555f775c73..f999e59200c 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s @@ -3519,3 +3519,63 @@ # CHECK-LE: mtcrf 255, 2 # encoding: [0x20,0xf1,0x4f,0x7c] mtcr 2 +# CHECK-BE: mfspr 4, 272 # encoding: [0x7c,0x90,0x42,0xa6] +# CHECK-LE: mfspr 4, 272 # encoding: [0xa6,0x42,0x90,0x7c] + mfsprg %r4, 0 + +# CHECK-BE: mfspr 4, 273 # encoding: [0x7c,0x91,0x42,0xa6] +# CHECK-LE: mfspr 4, 273 # encoding: [0xa6,0x42,0x91,0x7c] + mfsprg %r4, 1 + +# CHECK-BE: mfspr 4, 274 # encoding: [0x7c,0x92,0x42,0xa6] +# CHECK-LE: mfspr 4, 274 # encoding: [0xa6,0x42,0x92,0x7c] + mfsprg %r4, 2 + +# CHECK-BE: mfspr 4, 275 # encoding: [0x7c,0x93,0x42,0xa6] +# CHECK-LE: mfspr 4, 275 # encoding: [0xa6,0x42,0x93,0x7c] + mfsprg %r4, 3 + +# CHECK-BE: mfspr 2, 272 # encoding: [0x7c,0x50,0x42,0xa6] +# CHECK-LE: mfspr 2, 272 # encoding: [0xa6,0x42,0x50,0x7c] + mfsprg0 %r2 +# CHECK-BE: mfspr 2, 273 # encoding: [0x7c,0x51,0x42,0xa6] +# CHECK-LE: mfspr 2, 273 # encoding: [0xa6,0x42,0x51,0x7c] + mfsprg1 %r2 +# CHECK-BE: mfspr 2, 274 # encoding: [0x7c,0x52,0x42,0xa6] +# CHECK-LE: mfspr 2, 274 # encoding: [0xa6,0x42,0x52,0x7c] + mfsprg2 %r2 +# CHECK-BE: mfspr 2, 275 # encoding: [0x7c,0x53,0x42,0xa6] +# CHECK-LE: mfspr 2, 275 # encoding: [0xa6,0x42,0x53,0x7c] + mfsprg3 %r2 + +# CHECK-BE: mtspr 272, 4 # encoding: [0x7c,0x90,0x43,0xa6] +# CHECK-LE: mtspr 272, 4 # encoding: [0xa6,0x43,0x90,0x7c] + mtsprg 0, %r4 + +# CHECK-BE: mtspr 273, 4 # encoding: [0x7c,0x91,0x43,0xa6] +# CHECK-LE: mtspr 273, 4 # encoding: [0xa6,0x43,0x91,0x7c] + mtsprg 1, %r4 + +# CHECK-BE: mtspr 274, 4 # encoding: [0x7c,0x92,0x43,0xa6] +# CHECK-LE: mtspr 274, 4 # encoding: [0xa6,0x43,0x92,0x7c] + mtsprg 2, %r4 + +# CHECK-BE: mtspr 275, 4 # encoding: [0x7c,0x93,0x43,0xa6] +# CHECK-LE: mtspr 275, 4 # encoding: [0xa6,0x43,0x93,0x7c] + mtsprg 3, %r4 + +# CHECK-BE: mtspr 272, 4 # encoding: [0x7c,0x90,0x43,0xa6] +# CHECK-LE: mtspr 272, 4 # encoding: [0xa6,0x43,0x90,0x7c] + mtsprg0 %r4 + +# CHECK-BE: mtspr 273, 4 # encoding: [0x7c,0x91,0x43,0xa6] +# CHECK-LE: mtspr 273, 4 # encoding: [0xa6,0x43,0x91,0x7c] + mtsprg1 %r4 + +# CHECK-BE: mtspr 274, 4 # encoding: [0x7c,0x92,0x43,0xa6] +# CHECK-LE: mtspr 274, 4 # encoding: [0xa6,0x43,0x92,0x7c] + mtsprg2 %r4 + +# CHECK-BE: mtspr 275, 4 # encoding: [0x7c,0x93,0x43,0xa6] +# CHECK-LE: mtspr 275, 4 # encoding: [0xa6,0x43,0x93,0x7c] + mtsprg3 %r4 |
