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authorDuncan P. N. Exon Smith <dexonsmith@apple.com>2016-02-21 22:58:35 +0000
committerDuncan P. N. Exon Smith <dexonsmith@apple.com>2016-02-21 22:58:35 +0000
commitdc0848c0293d798fecd4d02273cf98e84dc95866 (patch)
treedc64f6a8e3754c45b452e5972576f429d84dd23d /llvm/lib
parente1fd99c197ede469c25d2c25e24397130a0a48f3 (diff)
downloadbcm5719-llvm-dc0848c0293d798fecd4d02273cf98e84dc95866.tar.gz
bcm5719-llvm-dc0848c0293d798fecd4d02273cf98e84dc95866.zip
CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC
Delete MachineInstr::getIterator(), since the term "iterator" is overloaded when talking about MachineInstr. - Downcast to ilist_node in iplist::getNextNode() and getPrevNode() so that ilist_node::getIterator() is still available. - Add it back as MachineInstr::getInstrIterator(). This matches the naming in MachineBasicBlock. - Add MachineInstr::getBundleIterator(). This is explicitly called "bundle" (not matching MachineBasicBlock) to disintinguish it clearly from ilist_node::getIterator(). - Update all calls. Some of these I switched to `auto` to remove boiler-plate, since the new name is clear about the type. There was one call I updated that looked fishy, but it wasn't clear what the right answer was. This was in X86FrameLowering::inlineStackProbe(), added in r252578 in lib/Target/X86/X86FrameLowering.cpp. I opted to leave the behaviour unchanged, but I'll reply to the original commit on the list in a moment. llvm-svn: 261504
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/DFAPacketizer.cpp2
-rw-r--r--llvm/lib/CodeGen/MachineCopyPropagation.cpp10
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp24
-rw-r--r--llvm/lib/CodeGen/ProcessImplicitDefs.cpp4
-rw-r--r--llvm/lib/CodeGen/ScheduleDAGInstrs.cpp8
-rw-r--r--llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp2
-rw-r--r--llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp14
-rw-r--r--llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp2
-rw-r--r--llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp4
-rw-r--r--llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp4
-rw-r--r--llvm/lib/Target/Mips/MipsAsmPrinter.cpp5
-rw-r--r--llvm/lib/Target/Sparc/SparcAsmPrinter.cpp4
-rw-r--r--llvm/lib/Target/X86/X86FrameLowering.cpp4
17 files changed, 48 insertions, 49 deletions
diff --git a/llvm/lib/CodeGen/DFAPacketizer.cpp b/llvm/lib/CodeGen/DFAPacketizer.cpp
index c8a3d381242..9e27fc9a27d 100644
--- a/llvm/lib/CodeGen/DFAPacketizer.cpp
+++ b/llvm/lib/CodeGen/DFAPacketizer.cpp
@@ -198,7 +198,7 @@ VLIWPacketizerList::~VLIWPacketizerList() {
void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB, MachineInstr *MI) {
if (CurrentPacketMIs.size() > 1) {
MachineInstr *MIFirst = CurrentPacketMIs.front();
- finalizeBundle(*MBB, MIFirst->getIterator(), MI->getIterator());
+ finalizeBundle(*MBB, MIFirst->getInstrIterator(), MI->getInstrIterator());
}
CurrentPacketMIs.clear();
ResourceTracker->clearResources();
diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
index 79240b3b94a..aef5db9ca8a 100644
--- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp
+++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
@@ -90,8 +90,10 @@ static bool NoInterveningSideEffect(const MachineInstr *CopyMI,
if (MI->getParent() != MBB)
return false;
- for (MachineBasicBlock::const_iterator I = std::next(CopyMI->getIterator()),
- E = MBB->end(), E2 = MI->getIterator(); I != E && I != E2; ++I) {
+ for (MachineBasicBlock::const_instr_iterator
+ I = std::next(CopyMI->getInstrIterator()),
+ E = MBB->instr_end(), E2 = MI->getInstrIterator();
+ I != E && I != E2; ++I) {
if (I->hasUnmodeledSideEffects() || I->isCall() ||
I->isTerminator())
return false;
@@ -163,8 +165,8 @@ void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
// Clear any kills of Def between CopyMI and MI. This extends the
// live range.
- for (MachineInstr &MMI
- : make_range(CopyMI->getIterator(), MI->getIterator()))
+ for (MachineInstr &MMI :
+ make_range(CopyMI->getInstrIterator(), MI->getInstrIterator()))
MMI.clearRegisterKills(Def, TRI);
MI->eraseFromParent();
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 4103253133e..86dbf7a3070 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -934,7 +934,7 @@ MachineInstr::mergeMemRefsWith(const MachineInstr& Other) {
bool MachineInstr::hasPropertyInBundle(unsigned Mask, QueryType Type) const {
assert(!isBundledWithPred() && "Must be called on bundle header");
- for (MachineBasicBlock::const_instr_iterator MII = getIterator();; ++MII) {
+ for (auto MII = getInstrIterator();; ++MII) {
if (MII->getDesc().getFlags() & Mask) {
if (Type == AnyInBundle)
return true;
@@ -958,10 +958,10 @@ bool MachineInstr::isIdenticalTo(const MachineInstr *Other,
if (isBundle()) {
// Both instructions are bundles, compare MIs inside the bundle.
- MachineBasicBlock::const_instr_iterator I1 = getIterator();
- MachineBasicBlock::const_instr_iterator E1 = getParent()->instr_end();
- MachineBasicBlock::const_instr_iterator I2 = Other->getIterator();
- MachineBasicBlock::const_instr_iterator E2= Other->getParent()->instr_end();
+ auto I1 = getInstrIterator();
+ auto E1 = getParent()->instr_end();
+ auto I2 = Other->getInstrIterator();
+ auto E2 = Other->getParent()->instr_end();
while (++I1 != E1 && I1->isInsideBundle()) {
++I2;
if (I2 == E2 || !I2->isInsideBundle() || !I1->isIdenticalTo(&*I2, Check))
@@ -1069,8 +1069,7 @@ unsigned MachineInstr::getNumExplicitOperands() const {
void MachineInstr::bundleWithPred() {
assert(!isBundledWithPred() && "MI is already bundled with its predecessor");
setFlag(BundledPred);
- MachineBasicBlock::instr_iterator Pred = getIterator();
- --Pred;
+ auto Pred = --getInstrIterator();
assert(!Pred->isBundledWithSucc() && "Inconsistent bundle flags");
Pred->setFlag(BundledSucc);
}
@@ -1078,8 +1077,7 @@ void MachineInstr::bundleWithPred() {
void MachineInstr::bundleWithSucc() {
assert(!isBundledWithSucc() && "MI is already bundled with its successor");
setFlag(BundledSucc);
- MachineBasicBlock::instr_iterator Succ = getIterator();
- ++Succ;
+ auto Succ = ++getInstrIterator();
assert(!Succ->isBundledWithPred() && "Inconsistent bundle flags");
Succ->setFlag(BundledPred);
}
@@ -1087,8 +1085,7 @@ void MachineInstr::bundleWithSucc() {
void MachineInstr::unbundleFromPred() {
assert(isBundledWithPred() && "MI isn't bundled with its predecessor");
clearFlag(BundledPred);
- MachineBasicBlock::instr_iterator Pred = getIterator();
- --Pred;
+ auto Pred = --getInstrIterator();
assert(Pred->isBundledWithSucc() && "Inconsistent bundle flags");
Pred->clearFlag(BundledSucc);
}
@@ -1096,8 +1093,7 @@ void MachineInstr::unbundleFromPred() {
void MachineInstr::unbundleFromSucc() {
assert(isBundledWithSucc() && "MI isn't bundled with its successor");
clearFlag(BundledSucc);
- MachineBasicBlock::instr_iterator Succ = getIterator();
- ++Succ;
+ auto Succ = ++getInstrIterator();
assert(Succ->isBundledWithPred() && "Inconsistent bundle flags");
Succ->clearFlag(BundledPred);
}
@@ -1232,7 +1228,7 @@ const TargetRegisterClass *MachineInstr::getRegClassConstraintEffect(
/// Return the number of instructions inside the MI bundle, not counting the
/// header instruction.
unsigned MachineInstr::getBundleSize() const {
- MachineBasicBlock::const_instr_iterator I = getIterator();
+ auto I = getInstrIterator();
unsigned Size = 0;
while (I->isBundledWithSucc()) {
++Size;
diff --git a/llvm/lib/CodeGen/ProcessImplicitDefs.cpp b/llvm/lib/CodeGen/ProcessImplicitDefs.cpp
index d27ea2f5186..ea5d2345da4 100644
--- a/llvm/lib/CodeGen/ProcessImplicitDefs.cpp
+++ b/llvm/lib/CodeGen/ProcessImplicitDefs.cpp
@@ -96,8 +96,8 @@ void ProcessImplicitDefs::processImplicitDef(MachineInstr *MI) {
// This is a physreg implicit-def.
// Look for the first instruction to use or define an alias.
- MachineBasicBlock::instr_iterator UserMI = MI->getIterator();
- MachineBasicBlock::instr_iterator UserE = MI->getParent()->instr_end();
+ auto UserMI = MI->getInstrIterator();
+ auto UserE = MI->getParent()->instr_end();
bool Found = false;
for (++UserMI; UserMI != UserE; ++UserMI) {
for (MachineOperand &MO : UserMI->operands()) {
diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
index aab3184c58a..46b1add34ba 100644
--- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -1200,8 +1200,8 @@ static void toggleBundleKillFlag(MachineInstr *MI, unsigned Reg,
// Once we set a kill flag on an instruction, we bail out, as otherwise we
// might set it on too many operands. We will clear as many flags as we
// can though.
- MachineBasicBlock::instr_iterator Begin = MI->getIterator();
- MachineBasicBlock::instr_iterator End = getBundleEnd(MI);
+ auto Begin = MI->getInstrIterator();
+ auto End = getBundleEnd(MI);
while (Begin != End) {
for (MachineOperand &MO : (--End)->operands()) {
if (!MO.isReg() || MO.isDef() || Reg != MO.getReg())
@@ -1334,8 +1334,8 @@ void ScheduleDAGInstrs::fixupKills(MachineBasicBlock *MBB) {
toggleKillFlag(MI, MO);
DEBUG(MI->dump());
DEBUG(if (MI->getOpcode() == TargetOpcode::BUNDLE) {
- MachineBasicBlock::instr_iterator Begin = MI->getIterator();
- MachineBasicBlock::instr_iterator End = getBundleEnd(MI);
+ auto Begin = MI->getInstrIterator();
+ auto End = getBundleEnd(MI);
while (++Begin != End)
DEBUG(Begin->dump());
});
diff --git a/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp b/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
index 9310ac4a44a..6f915e6e1bc 100644
--- a/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
+++ b/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
@@ -118,7 +118,7 @@ struct LDTLSCleanup : public MachineFunctionPass {
// Insert a copy from X0 to TLSBaseAddrReg for later.
MachineInstr *Copy =
- BuildMI(*I->getParent(), ++I->getIterator(), I->getDebugLoc(),
+ BuildMI(*I->getParent(), ++I->getInstrIterator(), I->getDebugLoc(),
TII->get(TargetOpcode::COPY), *TLSBaseAddrReg)
.addReg(AArch64::X0);
diff --git a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
index 8def8f32d70..7eff318ebb8 100644
--- a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
@@ -154,8 +154,8 @@ bool AArch64RedundantCopyElimination::optimizeCopy(MachineBasicBlock *MBB) {
MBB->addLiveIn(TargetReg);
// Clear any kills of TargetReg between CompBr and the last removed COPY.
- for (MachineInstr &MMI :
- make_range(MBB->begin()->getIterator(), LastChange->getIterator()))
+ for (MachineInstr &MMI : make_range(MBB->begin()->getInstrIterator(),
+ LastChange->getInstrIterator()))
MMI.clearRegisterKills(SmallestDef, TRI);
return true;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
index dfc652f31da..9d1d25bb5d7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
@@ -97,7 +97,7 @@ void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
#endif
if (MI->isBundle()) {
const MachineBasicBlock *MBB = MI->getParent();
- MachineBasicBlock::const_instr_iterator I = ++MI->getIterator();
+ auto I = ++MI->getInstrIterator();
while (I != MBB->instr_end() && I->isInsideBundle()) {
EmitInstruction(&*I);
++I;
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 49f32885266..832fd47bdcc 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -440,8 +440,8 @@ ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
bool ARMBaseInstrInfo::isPredicated(const MachineInstr *MI) const {
if (MI->isBundle()) {
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
while (++I != E && I->isInsideBundle()) {
int PIdx = I->findFirstPredOperandIdx();
if (PIdx != -1 && I->getOperand(PIdx).getImm() != ARMCC::AL)
@@ -647,8 +647,8 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
unsigned ARMBaseInstrInfo::getInstBundleLength(const MachineInstr *MI) const {
unsigned Size = 0;
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
while (++I != E && I->isInsideBundle()) {
assert(!I->isBundle() && "No nested bundle!");
Size += GetInstSizeInBytes(&*I);
@@ -3432,7 +3432,7 @@ static const MachineInstr *getBundledUseMI(const TargetRegisterInfo *TRI,
unsigned &UseIdx, unsigned &Dist) {
Dist = 0;
- MachineBasicBlock::const_instr_iterator II = ++MI->getIterator();
+ auto II = ++MI->getInstrIterator();
assert(II->isInsideBundle() && "Empty bundle?");
MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
@@ -3975,8 +3975,8 @@ unsigned ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
// other passes may query the latency of a bundled instruction.
if (MI->isBundle()) {
unsigned Latency = 0;
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
while (++I != E && I->isInsideBundle()) {
if (I->getOpcode() != ARM::t2IT)
Latency += getInstrLatency(ItinData, &*I, PredCost);
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index 56f3498e120..1c204e5fa7b 100644
--- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -731,7 +731,7 @@ void ARMExpandPseudo::ExpandMOV32BitImm(MachineBasicBlock &MBB,
HI16.addImm(Pred).addReg(PredReg);
if (RequiresBundling)
- finalizeBundle(MBB, LO16->getIterator(), MBBI->getIterator());
+ finalizeBundle(MBB, LO16->getInstrIterator(), MBBI->getInstrIterator());
TransferImpOps(MI, LO16, HI16);
MI.eraseFromParent();
diff --git a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
index bf0498dfda6..8c611b6f467 100644
--- a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
+++ b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
@@ -257,7 +257,7 @@ bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) {
// Finalize the bundle.
finalizeBundle(MBB, InsertPos.getInstrIterator(),
- ++LastITMI->getIterator());
+ ++LastITMI->getInstrIterator());
Modified = true;
++NumITs;
diff --git a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
index 48f3e3111a8..53030832d90 100644
--- a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
@@ -591,7 +591,7 @@ void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
if (MI->isBundle()) {
const MachineBasicBlock* MBB = MI->getParent();
- MachineBasicBlock::const_instr_iterator MII = MI->getIterator();
+ auto MII = MI->getInstrIterator();
unsigned IgnoreCount = 0;
for (++MII; MII != MBB->instr_end() && MII->isInsideBundle(); ++MII)
diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
index d20a809d6c0..457626f9b2c 100644
--- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
@@ -1295,7 +1295,7 @@ bool HexagonHardwareLoops::orderBumpCompare(MachineInstr *BumpI,
// Out of order.
unsigned PredR = CmpI->getOperand(0).getReg();
bool FoundBump = false;
- instr_iterator CmpIt = CmpI->getIterator(), NextIt = std::next(CmpIt);
+ instr_iterator CmpIt = CmpI->getInstrIterator(), NextIt = std::next(CmpIt);
for (instr_iterator I = NextIt, E = BB->instr_end(); I != E; ++I) {
MachineInstr *In = &*I;
for (unsigned i = 0, n = In->getNumOperands(); i < n; ++i) {
@@ -1307,7 +1307,7 @@ bool HexagonHardwareLoops::orderBumpCompare(MachineInstr *BumpI,
}
if (In == BumpI) {
- BB->splice(++BumpI->getIterator(), BB, CmpI->getIterator());
+ BB->splice(++BumpI->getInstrIterator(), BB, CmpI->getInstrIterator());
FoundBump = true;
break;
}
diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index 32088f31836..d827ec9ee1f 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -520,7 +520,7 @@ bool HexagonInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
// executed, so remove it.
if (SecLastOpcode == Hexagon::J2_jump && LastOpcode == Hexagon::J2_jump) {
TBB = SecondLastInst->getOperand(0).getMBB();
- I = LastInst->getIterator();
+ I = LastInst->getInstrIterator();
if (AllowModify)
I->eraseFromParent();
return false;
@@ -1260,7 +1260,7 @@ bool HexagonInstrInfo::PredicateInstruction(MachineInstr *MI,
for (unsigned i = 0, n = T->getNumOperands(); i < n; ++i)
MI->addOperand(T->getOperand(i));
- MachineBasicBlock::instr_iterator TI = T->getIterator();
+ auto TI = T->getInstrIterator();
B.erase(TI);
MachineRegisterInfo &MRI = B.getParent()->getRegInfo();
diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
index 957529376b3..6c2d9830f4f 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -173,9 +173,8 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
return;
}
-
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
do {
// Do any auto-generated pseudo lowerings.
diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
index e3b0f526674..184db39732b 100644
--- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -267,8 +267,8 @@ void SparcAsmPrinter::EmitInstruction(const MachineInstr *MI)
LowerGETPCXAndEmitMCInsts(MI, getSubtargetInfo());
return;
}
- MachineBasicBlock::const_instr_iterator I = MI->getIterator();
- MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
+ auto I = MI->getInstrIterator();
+ auto E = MI->getParent()->instr_end();
do {
MCInst TmpInst;
LowerSparcMachineInstrToMCInst(&*I, TmpInst, *this);
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 252c81a4bb2..1856ee1820e 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -462,7 +462,9 @@ void X86FrameLowering::inlineStackProbe(MachineFunction &MF,
}
if (ChkStkStub != nullptr) {
- MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator());
+ // FIXME: MBBI is a bundle iterator. Should this be getBundleIterator()?
+ MachineBasicBlock::iterator MBBI =
+ std::next(ChkStkStub->getInstrIterator());
assert(std::prev(MBBI).operator==(ChkStkStub) &&
"MBBI expected after __chkstk_stub.");
DebugLoc DL = PrologMBB.findDebugLoc(MBBI);
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