diff options
21 files changed, 69 insertions, 54 deletions
diff --git a/llvm/include/llvm/ADT/ilist.h b/llvm/include/llvm/ADT/ilist.h index f4dde441bf8..fe3d6791553 100644 --- a/llvm/include/llvm/ADT/ilist.h +++ b/llvm/include/llvm/ADT/ilist.h @@ -638,7 +638,7 @@ public: /// \brief Get the previous node, or \c nullptr for the list head. NodeTy *getPrevNode(NodeTy &N) const { - auto I = N.getIterator(); + auto I = static_cast<ilist_node<NodeTy> &>(N).getIterator(); if (I == begin()) return nullptr; return &*std::prev(I); @@ -650,7 +650,7 @@ public: /// \brief Get the next node, or \c nullptr for the list tail. NodeTy *getNextNode(NodeTy &N) const { - auto Next = std::next(N.getIterator()); + auto Next = std::next(static_cast<ilist_node<NodeTy> &>(N).getIterator()); if (Next == end()) return nullptr; return &*Next; diff --git a/llvm/include/llvm/CodeGen/MachineInstr.h b/llvm/include/llvm/CodeGen/MachineInstr.h index adb560970dd..911cd2b5c5c 100644 --- a/llvm/include/llvm/CodeGen/MachineInstr.h +++ b/llvm/include/llvm/CodeGen/MachineInstr.h @@ -25,6 +25,7 @@ #include "llvm/ADT/iterator_range.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/CodeGen/MachineOperand.h" +#include "llvm/CodeGen/MachineInstrBundleIterator.h" #include "llvm/IR/DebugInfo.h" #include "llvm/IR/DebugLoc.h" #include "llvm/IR/InlineAsm.h" @@ -139,6 +140,21 @@ public: const MachineBasicBlock* getParent() const { return Parent; } MachineBasicBlock* getParent() { return Parent; } + // Disallow getIterator(), since it's ambiguous. + void getIterator() = delete; + typedef ilist_iterator<MachineInstr> instr_iterator; + typedef ilist_iterator<const MachineInstr> const_instr_iterator; + instr_iterator getInstrIterator() { return instr_iterator(this); } + const_instr_iterator getInstrIterator() const { + return const_instr_iterator(this); + } + typedef MachineInstrBundleIterator<MachineInstr> bundle_iterator; + typedef MachineInstrBundleIterator<const MachineInstr> const_bundle_iterator; + bundle_iterator getBundleIterator() { return bundle_iterator(this); } + const_bundle_iterator getBundleIterator() const { + return const_bundle_iterator(this); + } + /// Return the asm printer flags bitvector. uint8_t getAsmPrinterFlags() const { return AsmPrinterFlags; } diff --git a/llvm/include/llvm/CodeGen/MachineInstrBuilder.h b/llvm/include/llvm/CodeGen/MachineInstrBuilder.h index aea7f8e329a..d7b39e68dc4 100644 --- a/llvm/include/llvm/CodeGen/MachineInstrBuilder.h +++ b/llvm/include/llvm/CodeGen/MachineInstrBuilder.h @@ -472,7 +472,7 @@ public: if (I == Begin) { if (!empty()) MI->bundleWithSucc(); - Begin = MI->getIterator(); + Begin = MI->getInstrIterator(); return *this; } if (I == End) { diff --git a/llvm/include/llvm/CodeGen/MachineInstrBundle.h b/llvm/include/llvm/CodeGen/MachineInstrBundle.h index 4e88606c05a..d3655471b32 100644 --- a/llvm/include/llvm/CodeGen/MachineInstrBundle.h +++ b/llvm/include/llvm/CodeGen/MachineInstrBundle.h @@ -116,10 +116,10 @@ protected: /// explicit MachineOperandIteratorBase(MachineInstr *MI, bool WholeBundle) { if (WholeBundle) { - InstrI = getBundleStart(MI)->getIterator(); + InstrI = getBundleStart(MI)->getInstrIterator(); InstrE = MI->getParent()->instr_end(); } else { - InstrI = InstrE = MI->getIterator(); + InstrI = InstrE = MI->getInstrIterator(); ++InstrE; } OpI = InstrI->operands_begin(); diff --git a/llvm/lib/CodeGen/DFAPacketizer.cpp b/llvm/lib/CodeGen/DFAPacketizer.cpp index c8a3d381242..9e27fc9a27d 100644 --- a/llvm/lib/CodeGen/DFAPacketizer.cpp +++ b/llvm/lib/CodeGen/DFAPacketizer.cpp @@ -198,7 +198,7 @@ VLIWPacketizerList::~VLIWPacketizerList() { void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB, MachineInstr *MI) { if (CurrentPacketMIs.size() > 1) { MachineInstr *MIFirst = CurrentPacketMIs.front(); - finalizeBundle(*MBB, MIFirst->getIterator(), MI->getIterator()); + finalizeBundle(*MBB, MIFirst->getInstrIterator(), MI->getInstrIterator()); } CurrentPacketMIs.clear(); ResourceTracker->clearResources(); diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp index 79240b3b94a..aef5db9ca8a 100644 --- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp +++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp @@ -90,8 +90,10 @@ static bool NoInterveningSideEffect(const MachineInstr *CopyMI, if (MI->getParent() != MBB) return false; - for (MachineBasicBlock::const_iterator I = std::next(CopyMI->getIterator()), - E = MBB->end(), E2 = MI->getIterator(); I != E && I != E2; ++I) { + for (MachineBasicBlock::const_instr_iterator + I = std::next(CopyMI->getInstrIterator()), + E = MBB->instr_end(), E2 = MI->getInstrIterator(); + I != E && I != E2; ++I) { if (I->hasUnmodeledSideEffects() || I->isCall() || I->isTerminator()) return false; @@ -163,8 +165,8 @@ void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) { // Clear any kills of Def between CopyMI and MI. This extends the // live range. - for (MachineInstr &MMI - : make_range(CopyMI->getIterator(), MI->getIterator())) + for (MachineInstr &MMI : + make_range(CopyMI->getInstrIterator(), MI->getInstrIterator())) MMI.clearRegisterKills(Def, TRI); MI->eraseFromParent(); diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index 4103253133e..86dbf7a3070 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -934,7 +934,7 @@ MachineInstr::mergeMemRefsWith(const MachineInstr& Other) { bool MachineInstr::hasPropertyInBundle(unsigned Mask, QueryType Type) const { assert(!isBundledWithPred() && "Must be called on bundle header"); - for (MachineBasicBlock::const_instr_iterator MII = getIterator();; ++MII) { + for (auto MII = getInstrIterator();; ++MII) { if (MII->getDesc().getFlags() & Mask) { if (Type == AnyInBundle) return true; @@ -958,10 +958,10 @@ bool MachineInstr::isIdenticalTo(const MachineInstr *Other, if (isBundle()) { // Both instructions are bundles, compare MIs inside the bundle. - MachineBasicBlock::const_instr_iterator I1 = getIterator(); - MachineBasicBlock::const_instr_iterator E1 = getParent()->instr_end(); - MachineBasicBlock::const_instr_iterator I2 = Other->getIterator(); - MachineBasicBlock::const_instr_iterator E2= Other->getParent()->instr_end(); + auto I1 = getInstrIterator(); + auto E1 = getParent()->instr_end(); + auto I2 = Other->getInstrIterator(); + auto E2 = Other->getParent()->instr_end(); while (++I1 != E1 && I1->isInsideBundle()) { ++I2; if (I2 == E2 || !I2->isInsideBundle() || !I1->isIdenticalTo(&*I2, Check)) @@ -1069,8 +1069,7 @@ unsigned MachineInstr::getNumExplicitOperands() const { void MachineInstr::bundleWithPred() { assert(!isBundledWithPred() && "MI is already bundled with its predecessor"); setFlag(BundledPred); - MachineBasicBlock::instr_iterator Pred = getIterator(); - --Pred; + auto Pred = --getInstrIterator(); assert(!Pred->isBundledWithSucc() && "Inconsistent bundle flags"); Pred->setFlag(BundledSucc); } @@ -1078,8 +1077,7 @@ void MachineInstr::bundleWithPred() { void MachineInstr::bundleWithSucc() { assert(!isBundledWithSucc() && "MI is already bundled with its successor"); setFlag(BundledSucc); - MachineBasicBlock::instr_iterator Succ = getIterator(); - ++Succ; + auto Succ = ++getInstrIterator(); assert(!Succ->isBundledWithPred() && "Inconsistent bundle flags"); Succ->setFlag(BundledPred); } @@ -1087,8 +1085,7 @@ void MachineInstr::bundleWithSucc() { void MachineInstr::unbundleFromPred() { assert(isBundledWithPred() && "MI isn't bundled with its predecessor"); clearFlag(BundledPred); - MachineBasicBlock::instr_iterator Pred = getIterator(); - --Pred; + auto Pred = --getInstrIterator(); assert(Pred->isBundledWithSucc() && "Inconsistent bundle flags"); Pred->clearFlag(BundledSucc); } @@ -1096,8 +1093,7 @@ void MachineInstr::unbundleFromPred() { void MachineInstr::unbundleFromSucc() { assert(isBundledWithSucc() && "MI isn't bundled with its successor"); clearFlag(BundledSucc); - MachineBasicBlock::instr_iterator Succ = getIterator(); - ++Succ; + auto Succ = ++getInstrIterator(); assert(Succ->isBundledWithPred() && "Inconsistent bundle flags"); Succ->clearFlag(BundledPred); } @@ -1232,7 +1228,7 @@ const TargetRegisterClass *MachineInstr::getRegClassConstraintEffect( /// Return the number of instructions inside the MI bundle, not counting the /// header instruction. unsigned MachineInstr::getBundleSize() const { - MachineBasicBlock::const_instr_iterator I = getIterator(); + auto I = getInstrIterator(); unsigned Size = 0; while (I->isBundledWithSucc()) { ++Size; diff --git a/llvm/lib/CodeGen/ProcessImplicitDefs.cpp b/llvm/lib/CodeGen/ProcessImplicitDefs.cpp index d27ea2f5186..ea5d2345da4 100644 --- a/llvm/lib/CodeGen/ProcessImplicitDefs.cpp +++ b/llvm/lib/CodeGen/ProcessImplicitDefs.cpp @@ -96,8 +96,8 @@ void ProcessImplicitDefs::processImplicitDef(MachineInstr *MI) { // This is a physreg implicit-def. // Look for the first instruction to use or define an alias. - MachineBasicBlock::instr_iterator UserMI = MI->getIterator(); - MachineBasicBlock::instr_iterator UserE = MI->getParent()->instr_end(); + auto UserMI = MI->getInstrIterator(); + auto UserE = MI->getParent()->instr_end(); bool Found = false; for (++UserMI; UserMI != UserE; ++UserMI) { for (MachineOperand &MO : UserMI->operands()) { diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp index aab3184c58a..46b1add34ba 100644 --- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -1200,8 +1200,8 @@ static void toggleBundleKillFlag(MachineInstr *MI, unsigned Reg, // Once we set a kill flag on an instruction, we bail out, as otherwise we // might set it on too many operands. We will clear as many flags as we // can though. - MachineBasicBlock::instr_iterator Begin = MI->getIterator(); - MachineBasicBlock::instr_iterator End = getBundleEnd(MI); + auto Begin = MI->getInstrIterator(); + auto End = getBundleEnd(MI); while (Begin != End) { for (MachineOperand &MO : (--End)->operands()) { if (!MO.isReg() || MO.isDef() || Reg != MO.getReg()) @@ -1334,8 +1334,8 @@ void ScheduleDAGInstrs::fixupKills(MachineBasicBlock *MBB) { toggleKillFlag(MI, MO); DEBUG(MI->dump()); DEBUG(if (MI->getOpcode() == TargetOpcode::BUNDLE) { - MachineBasicBlock::instr_iterator Begin = MI->getIterator(); - MachineBasicBlock::instr_iterator End = getBundleEnd(MI); + auto Begin = MI->getInstrIterator(); + auto End = getBundleEnd(MI); while (++Begin != End) DEBUG(Begin->dump()); }); diff --git a/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp b/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp index 9310ac4a44a..6f915e6e1bc 100644 --- a/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp +++ b/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp @@ -118,7 +118,7 @@ struct LDTLSCleanup : public MachineFunctionPass { // Insert a copy from X0 to TLSBaseAddrReg for later. MachineInstr *Copy = - BuildMI(*I->getParent(), ++I->getIterator(), I->getDebugLoc(), + BuildMI(*I->getParent(), ++I->getInstrIterator(), I->getDebugLoc(), TII->get(TargetOpcode::COPY), *TLSBaseAddrReg) .addReg(AArch64::X0); diff --git a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp index 8def8f32d70..7eff318ebb8 100644 --- a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp +++ b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp @@ -154,8 +154,8 @@ bool AArch64RedundantCopyElimination::optimizeCopy(MachineBasicBlock *MBB) { MBB->addLiveIn(TargetReg); // Clear any kills of TargetReg between CompBr and the last removed COPY. - for (MachineInstr &MMI : - make_range(MBB->begin()->getIterator(), LastChange->getIterator())) + for (MachineInstr &MMI : make_range(MBB->begin()->getInstrIterator(), + LastChange->getInstrIterator())) MMI.clearRegisterKills(SmallestDef, TRI); return true; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp index dfc652f31da..9d1d25bb5d7 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp @@ -97,7 +97,7 @@ void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) { #endif if (MI->isBundle()) { const MachineBasicBlock *MBB = MI->getParent(); - MachineBasicBlock::const_instr_iterator I = ++MI->getIterator(); + auto I = ++MI->getInstrIterator(); while (I != MBB->instr_end() && I->isInsideBundle()) { EmitInstruction(&*I); ++I; diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 49f32885266..832fd47bdcc 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -440,8 +440,8 @@ ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { bool ARMBaseInstrInfo::isPredicated(const MachineInstr *MI) const { if (MI->isBundle()) { - MachineBasicBlock::const_instr_iterator I = MI->getIterator(); - MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end(); + auto I = MI->getInstrIterator(); + auto E = MI->getParent()->instr_end(); while (++I != E && I->isInsideBundle()) { int PIdx = I->findFirstPredOperandIdx(); if (PIdx != -1 && I->getOperand(PIdx).getImm() != ARMCC::AL) @@ -647,8 +647,8 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { unsigned ARMBaseInstrInfo::getInstBundleLength(const MachineInstr *MI) const { unsigned Size = 0; - MachineBasicBlock::const_instr_iterator I = MI->getIterator(); - MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end(); + auto I = MI->getInstrIterator(); + auto E = MI->getParent()->instr_end(); while (++I != E && I->isInsideBundle()) { assert(!I->isBundle() && "No nested bundle!"); Size += GetInstSizeInBytes(&*I); @@ -3432,7 +3432,7 @@ static const MachineInstr *getBundledUseMI(const TargetRegisterInfo *TRI, unsigned &UseIdx, unsigned &Dist) { Dist = 0; - MachineBasicBlock::const_instr_iterator II = ++MI->getIterator(); + auto II = ++MI->getInstrIterator(); assert(II->isInsideBundle() && "Empty bundle?"); MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end(); @@ -3975,8 +3975,8 @@ unsigned ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, // other passes may query the latency of a bundled instruction. if (MI->isBundle()) { unsigned Latency = 0; - MachineBasicBlock::const_instr_iterator I = MI->getIterator(); - MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end(); + auto I = MI->getInstrIterator(); + auto E = MI->getParent()->instr_end(); while (++I != E && I->isInsideBundle()) { if (I->getOpcode() != ARM::t2IT) Latency += getInstrLatency(ItinData, &*I, PredCost); diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp index 56f3498e120..1c204e5fa7b 100644 --- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -731,7 +731,7 @@ void ARMExpandPseudo::ExpandMOV32BitImm(MachineBasicBlock &MBB, HI16.addImm(Pred).addReg(PredReg); if (RequiresBundling) - finalizeBundle(MBB, LO16->getIterator(), MBBI->getIterator()); + finalizeBundle(MBB, LO16->getInstrIterator(), MBBI->getInstrIterator()); TransferImpOps(MI, LO16, HI16); MI.eraseFromParent(); diff --git a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp index bf0498dfda6..8c611b6f467 100644 --- a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp +++ b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp @@ -257,7 +257,7 @@ bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) { // Finalize the bundle. finalizeBundle(MBB, InsertPos.getInstrIterator(), - ++LastITMI->getIterator()); + ++LastITMI->getInstrIterator()); Modified = true; ++NumITs; diff --git a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp index 48f3e3111a8..53030832d90 100644 --- a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp +++ b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp @@ -591,7 +591,7 @@ void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) { if (MI->isBundle()) { const MachineBasicBlock* MBB = MI->getParent(); - MachineBasicBlock::const_instr_iterator MII = MI->getIterator(); + auto MII = MI->getInstrIterator(); unsigned IgnoreCount = 0; for (++MII; MII != MBB->instr_end() && MII->isInsideBundle(); ++MII) diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp index d20a809d6c0..457626f9b2c 100644 --- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -1295,7 +1295,7 @@ bool HexagonHardwareLoops::orderBumpCompare(MachineInstr *BumpI, // Out of order. unsigned PredR = CmpI->getOperand(0).getReg(); bool FoundBump = false; - instr_iterator CmpIt = CmpI->getIterator(), NextIt = std::next(CmpIt); + instr_iterator CmpIt = CmpI->getInstrIterator(), NextIt = std::next(CmpIt); for (instr_iterator I = NextIt, E = BB->instr_end(); I != E; ++I) { MachineInstr *In = &*I; for (unsigned i = 0, n = In->getNumOperands(); i < n; ++i) { @@ -1307,7 +1307,7 @@ bool HexagonHardwareLoops::orderBumpCompare(MachineInstr *BumpI, } if (In == BumpI) { - BB->splice(++BumpI->getIterator(), BB, CmpI->getIterator()); + BB->splice(++BumpI->getInstrIterator(), BB, CmpI->getInstrIterator()); FoundBump = true; break; } diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp index 32088f31836..d827ec9ee1f 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp @@ -520,7 +520,7 @@ bool HexagonInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, // executed, so remove it. if (SecLastOpcode == Hexagon::J2_jump && LastOpcode == Hexagon::J2_jump) { TBB = SecondLastInst->getOperand(0).getMBB(); - I = LastInst->getIterator(); + I = LastInst->getInstrIterator(); if (AllowModify) I->eraseFromParent(); return false; @@ -1260,7 +1260,7 @@ bool HexagonInstrInfo::PredicateInstruction(MachineInstr *MI, for (unsigned i = 0, n = T->getNumOperands(); i < n; ++i) MI->addOperand(T->getOperand(i)); - MachineBasicBlock::instr_iterator TI = T->getIterator(); + auto TI = T->getInstrIterator(); B.erase(TI); MachineRegisterInfo &MRI = B.getParent()->getRegInfo(); diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp index 957529376b3..6c2d9830f4f 100644 --- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp +++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp @@ -173,9 +173,8 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) { return; } - - MachineBasicBlock::const_instr_iterator I = MI->getIterator(); - MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end(); + auto I = MI->getInstrIterator(); + auto E = MI->getParent()->instr_end(); do { // Do any auto-generated pseudo lowerings. diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp index e3b0f526674..184db39732b 100644 --- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp +++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp @@ -267,8 +267,8 @@ void SparcAsmPrinter::EmitInstruction(const MachineInstr *MI) LowerGETPCXAndEmitMCInsts(MI, getSubtargetInfo()); return; } - MachineBasicBlock::const_instr_iterator I = MI->getIterator(); - MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end(); + auto I = MI->getInstrIterator(); + auto E = MI->getParent()->instr_end(); do { MCInst TmpInst; LowerSparcMachineInstrToMCInst(&*I, TmpInst, *this); diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp index 252c81a4bb2..1856ee1820e 100644 --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -462,7 +462,9 @@ void X86FrameLowering::inlineStackProbe(MachineFunction &MF, } if (ChkStkStub != nullptr) { - MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator()); + // FIXME: MBBI is a bundle iterator. Should this be getBundleIterator()? + MachineBasicBlock::iterator MBBI = + std::next(ChkStkStub->getInstrIterator()); assert(std::prev(MBBI).operator==(ChkStkStub) && "MBBI expected after __chkstk_stub."); DebugLoc DL = PrologMBB.findDebugLoc(MBBI); |
