summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@intel.com>2018-08-13 06:53:49 +0000
committerCraig Topper <craig.topper@intel.com>2018-08-13 06:53:49 +0000
commitcacf12a149a2d013acfd560aba46b271c1dc860b (patch)
tree2868511714c7edeb42d6d47fad305964090cb1af /llvm/lib
parente42a15953750ee9cc666c300cefaa944af21b436 (diff)
downloadbcm5719-llvm-cacf12a149a2d013acfd560aba46b271c1dc860b.tar.gz
bcm5719-llvm-cacf12a149a2d013acfd560aba46b271c1dc860b.zip
[SelectionDAG] In PromoteFloatOp_BITCAST, insert a bitcast after the fp_to_fp16 in case the result type isn't a scalar integer.
This is another variation of PR38533. In this case, the result type of the bitcast is legal and 16-bits wide, but not a scalar integer. So we need to emit the convert to i16 and then bitcast it to the true result type. This new bitcast will be further type legalized if necessary. llvm-svn: 339536
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp19
1 files changed, 11 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
index feca1c10f52..2e6f6edbce5 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -1778,15 +1778,16 @@ SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) {
SDValue Op = N->getOperand(0);
EVT OpVT = Op->getValueType(0);
- EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
- assert (IVT == N->getValueType(0) && "Bitcast to type of different size");
-
SDValue Promoted = GetPromotedFloat(N->getOperand(0));
EVT PromotedVT = Promoted->getValueType(0);
// Convert the promoted float value to the desired IVT.
- return DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N), IVT,
- Promoted);
+ EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
+ SDValue Convert = DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N),
+ IVT, Promoted);
+ // The final result type might not be an scalar so we need a bitcast. The
+ // bitcast will be further legalized if needed.
+ return DAG.getBitcast(N->getValueType(0), Convert);
}
// Promote Operand 1 of FCOPYSIGN. Operand 0 ought to be handled by
@@ -1941,9 +1942,11 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
EVT VT = N->getValueType(0);
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
- // Input type isn't guaranteed to be i16 so bitcast if not. The bitcast
- // will be legalized further if necessary.
- SDValue Cast = DAG.getBitcast(MVT::i16, N->getOperand(0));
+ // Input type isn't guaranteed to be a scalar int so bitcast if not. The
+ // bitcast will be legalized further if necessary.
+ EVT IVT = EVT::getIntegerVT(*DAG.getContext(),
+ N->getOperand(0).getValueType().getSizeInBits());
+ SDValue Cast = DAG.getBitcast(IVT, N->getOperand(0));
return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, Cast);
}
OpenPOWER on IntegriCloud