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| author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2019-02-15 19:13:55 +0000 |
|---|---|---|
| committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2019-02-15 19:13:55 +0000 |
| commit | c0eef3542b3a045d1a868baff150f2e4f775d3ca (patch) | |
| tree | 2e3c7ea4e562e94b08561fd1efc0cc07c449edfe /llvm/lib | |
| parent | 5f5cac3ae29d44869f64d9629d9443656199fc1d (diff) | |
| download | bcm5719-llvm-c0eef3542b3a045d1a868baff150f2e4f775d3ca.tar.gz bcm5719-llvm-c0eef3542b3a045d1a868baff150f2e4f775d3ca.zip | |
Recommit "[SystemZ] Do not emit VEXTEND or VROUND nodes without vector support."
It seems there were some problem with using a .mir test. For some reason
doing '-stop-before=codegenprepare' and then '-start-before=codegenprepare'
on the output .mir file results in the NoVRegs Property after instruction
selection.
Recommitting the same test as an .ll file instead.
llvm-svn: 354160
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp index 6bbc4e9fd10..310fd41354e 100644 --- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -5505,6 +5505,10 @@ SDValue SystemZTargetLowering::combineJOIN_DWORDS( SDValue SystemZTargetLowering::combineFP_ROUND( SDNode *N, DAGCombinerInfo &DCI) const { + + if (!Subtarget.hasVector()) + return SDValue(); + // (fpround (extract_vector_elt X 0)) // (fpround (extract_vector_elt X 1)) -> // (extract_vector_elt (VROUND X) 0) @@ -5552,6 +5556,10 @@ SDValue SystemZTargetLowering::combineFP_ROUND( SDValue SystemZTargetLowering::combineFP_EXTEND( SDNode *N, DAGCombinerInfo &DCI) const { + + if (!Subtarget.hasVector()) + return SDValue(); + // (fpextend (extract_vector_elt X 0)) // (fpextend (extract_vector_elt X 2)) -> // (extract_vector_elt (VEXTEND X) 0) |
