[hexagon] Distinguish the 'o', 'v', and 'm' inline assembly memory constraints.

Summary:
But still handle them the same way since I don't know how they differ on
this target.

No functional change intended.

Reviewers: kparzysz, adasgupt

Reviewed By: kparzysz, adasgupt

Subscribers: colinl, llvm-commits

Differential Revision: http://reviews.llvm.org/D8204

llvm-svn: 232374

2 files changed, 8 insertions, 5 deletions

diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
index 795faf97af4..d746df98cdc 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
@@ -1108,11 +1108,11 @@ SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
   SDValue Inp = Op, Res;
 
   switch (ConstraintID) {
-  case InlineAsm::Constraint_o:   // Offsetable.
-  case InlineAsm::Constraint_v:   // Not offsetable.
   default:
     return true;
-  case InlineAsm::Constraint_m:   // Memory.
+  case InlineAsm::Constraint_o: // Offsetable.
+  case InlineAsm::Constraint_v: // Not offsetable.
+  case InlineAsm::Constraint_m: // Memory.
     if (SelectAddrFI(Inp, Res))
       OutOps.push_back(Res);
     else
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.h b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
index 7b772f07eb0..99214c8d445 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.h
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
@@ -185,8 +185,11 @@ bool isPositiveHalfWord(SDNode *N);
 
     unsigned getInlineAsmMemConstraint(
         const std::string &ConstraintCode) const override {
-      // FIXME: Map different constraints differently.
-      return InlineAsm::Constraint_m;
+      if (ConstraintCode == "o")
+        return InlineAsm::Constraint_o;
+      else if (ConstraintCode == "v")
+        return InlineAsm::Constraint_v;
+      return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
     }
 
     // Intrinsics