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| author | Daniel Kiss <daniel.kiss@arm.com> | 2020-02-13 10:42:39 +0000 |
|---|---|---|
| committer | Tom Stellard <tstellar@redhat.com> | 2020-06-16 20:05:14 -0700 |
| commit | aab50695971617d37ad420b476671995f7078e79 (patch) | |
| tree | cfe7c3fcce40d3a7f459c0604db720796235ccdd /llvm/lib | |
| parent | b980cc1cd3200dbf7603c7dd04335165b7578baa (diff) | |
| download | bcm5719-llvm-aab50695971617d37ad420b476671995f7078e79.tar.gz bcm5719-llvm-aab50695971617d37ad420b476671995f7078e79.zip | |
[AArch64] Fix BTI landing pad generation.
In some cases BTI landing pad is inserted even compatible instruction
was there already. Meta instruction does not count in this case
therefore skip them in the check for first instructions in the function.
Differential revision: https://reviews.llvm.org/D74492
(cherry picked from commit d5a186a60014dc1a8c979c978cb32aba7ecb9102)
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64BranchTargets.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64BranchTargets.cpp b/llvm/lib/Target/AArch64/AArch64BranchTargets.cpp index 6fa3a462bc7..be6450c9a45 100644 --- a/llvm/lib/Target/AArch64/AArch64BranchTargets.cpp +++ b/llvm/lib/Target/AArch64/AArch64BranchTargets.cpp @@ -118,6 +118,10 @@ void AArch64BranchTargets::addBTI(MachineBasicBlock &MBB, bool CouldCall, auto MBBI = MBB.begin(); + // Skip the meta instuctions, those will be removed anyway. + for (; MBBI != MBB.end() && MBBI->isMetaInstruction(); ++MBBI) + ; + // PACI[AB]SP are implicitly BTI JC, so no BTI instruction needed there. if (MBBI != MBB.end() && (MBBI->getOpcode() == AArch64::PACIASP || MBBI->getOpcode() == AArch64::PACIBSP)) |
