[Hexagon] Avoid creating 5-instruction packets with vgather pseudos

Change the resource usage of the vgather pseudos from SLOT0+LD to
SLOT0+SLOT1.

llvm-svn: 355524

1 files changed, 7 insertions, 5 deletions

diff --git a/llvm/lib/Target/Hexagon/HexagonIICHVX.td b/llvm/lib/Target/Hexagon/HexagonIICHVX.td
index 1d71d60bf58..06e9c83cf30 100644
--- a/llvm/lib/Target/Hexagon/HexagonIICHVX.td
+++ b/llvm/lib/Target/Hexagon/HexagonIICHVX.td
@@ -16,12 +16,14 @@ class HVXItin {
        InstrStage<1, [CVI_XLANE,CVI_SHIFT, CVI_MPY0, CVI_MPY1]>],
       [9, 7, 7, 7], [HVX_FWD, HVX_FWD, HVX_FWD]>,
 
-    // Used by Gather Pseudo Instructions which are expanded into
-    // V6_vgather* and V6_vS32b_new_ai. Even though these instructions
-    // use CVI_ST resource, it's not included below to avoid having more than
-    // 4 InstrStages and thus changing 'MaxResTerms' to 5.
+    // Used by gather pseudo-instructions which are expanded into V6_vgather*
+    // and V6_vS32b_new_ai. Even though these instructions use CVI_LD resource,
+    // it's not included below to avoid having more than 4 InstrStages and
+    // thus changing 'MaxResTerms' to 5. Instead, both SLOT0 and SLOT1 are
+    // used, which should be sufficient.
     InstrItinData <CVI_GATHER_PSEUDO,
       [InstrStage<1, [SLOT0], 0>,
-       InstrStage<1, [CVI_LD], 0>, InstrStage<1, [CVI_ST], 0>,
+       InstrStage<1, [SLOT1], 0>,
+       InstrStage<1, [CVI_ST], 0>,
        InstrStage<1, [CVI_MPY01, CVI_XLSHF]>]>];
 }