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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-07 13:10:08 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-01-09 10:29:32 -0500 |
| commit | 7d677421607cbfdd8d1e96275c613d3db8a0e51f (patch) | |
| tree | 90ef26c715bc0adf4543f5fa97a524434d68db9e /llvm/lib | |
| parent | e71af775684a83f0d1d05ab5225d36830d5aa87e (diff) | |
| download | bcm5719-llvm-7d677421607cbfdd8d1e96275c613d3db8a0e51f.tar.gz bcm5719-llvm-7d677421607cbfdd8d1e96275c613d3db8a0e51f.zip | |
AMDGPU/GlobalISel: Fix import of zext of s16 op patterns
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 |
2 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp index 095c667e143..132c51c9e08 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp @@ -1684,6 +1684,8 @@ bool AMDGPUInstructionSelector::select(MachineInstr &I) { case TargetOpcode::G_SEXT: case TargetOpcode::G_ZEXT: case TargetOpcode::G_ANYEXT: + if (selectImpl(I, *CoverageInfo)) + return true; return selectG_SZA_EXT(I); case TargetOpcode::G_BRCOND: return selectG_BRCOND(I); diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td index 064b2666554..aaadc3dbc72 100644 --- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td @@ -729,7 +729,7 @@ multiclass Arithmetic_i16_0Hi_Pats <SDPatternOperator op, Instruction inst> { def : GCNPat< (i32 (zext (op i16:$src0, i16:$src1))), - (inst $src0, $src1) + (inst VSrc_b16:$src0, VSrc_b16:$src1) >; def : GCNPat< @@ -771,7 +771,7 @@ let Predicates = [Has16BitInsts] in { // TODO: Also do for 64-bit. def : GCNPat< (add i16:$src0, (i16 NegSubInlineConst16:$src1)), - (V_SUB_U16_e64 $src0, NegSubInlineConst16:$src1) + (V_SUB_U16_e64 VSrc_b16:$src0, NegSubInlineConst16:$src1) >; @@ -779,7 +779,7 @@ let Predicates = [Has16BitInsts, isGFX7GFX8GFX9] in { def : GCNPat< (i32 (zext (add i16:$src0, (i16 NegSubInlineConst16:$src1)))), - (V_SUB_U16_e64 $src0, NegSubInlineConst16:$src1) + (V_SUB_U16_e64 VSrc_b16:$src0, NegSubInlineConst16:$src1) >; defm : Arithmetic_i16_0Hi_Pats<add, V_ADD_U16_e64>; |
