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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-12-10 12:08:04 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-12-10 12:08:04 +0000 |
| commit | 6de94a1adca7d75148263812e9dac0d857b3b79c (patch) | |
| tree | 474c1972df0fd103c93346660396532483cb254b /llvm/lib | |
| parent | cd5817111065f8b5b0ced2c526b2dcf586b6269b (diff) | |
| download | bcm5719-llvm-6de94a1adca7d75148263812e9dac0d857b3b79c.tar.gz bcm5719-llvm-6de94a1adca7d75148263812e9dac0d857b3b79c.zip | |
[X86] Tag SSE4A instructions as SSE INTALU scheduler classes
llvm-svn: 320301
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 52d2a49d44a..2dbe5e6f397 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -7448,23 +7448,27 @@ def EXTRQI : Ii8<0x78, MRMXr, (outs VR128:$dst), (ins VR128:$src, u8imm:$len, u8imm:$idx), "extrq\t{$idx, $len, $src|$src, $len, $idx}", [(set VR128:$dst, (X86extrqi VR128:$src, imm:$len, - imm:$idx))]>, PD; + imm:$idx))], IIC_SSE_INTALU_P_RR>, + PD, Sched<[WriteVecALU]>; def EXTRQ : I<0x79, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src, VR128:$mask), "extrq\t{$mask, $src|$src, $mask}", [(set VR128:$dst, (int_x86_sse4a_extrq VR128:$src, - VR128:$mask))]>, PD; + VR128:$mask))], IIC_SSE_INTALU_P_RR>, + PD, Sched<[WriteVecALU]>; def INSERTQI : Ii8<0x78, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src, VR128:$src2, u8imm:$len, u8imm:$idx), "insertq\t{$idx, $len, $src2, $src|$src, $src2, $len, $idx}", [(set VR128:$dst, (X86insertqi VR128:$src, VR128:$src2, - imm:$len, imm:$idx))]>, XD; + imm:$len, imm:$idx))], IIC_SSE_INTALU_P_RR>, + XD, Sched<[WriteVecALU]>; def INSERTQ : I<0x79, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src, VR128:$mask), "insertq\t{$mask, $src|$src, $mask}", [(set VR128:$dst, (int_x86_sse4a_insertq VR128:$src, - VR128:$mask))]>, XD; + VR128:$mask))], IIC_SSE_INTALU_P_RR>, + XD, Sched<[WriteVecALU]>; } } // ExeDomain = SSEPackedInt |
