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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2016-07-29 16:56:25 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2016-07-29 16:56:25 +0000
commit6db3cfe2da6bc0236509c2b6a18e23c15fc498ff (patch)
tree91c9bd40d53126cb290ff777db056719d1454ae0 /llvm/lib
parent784e3423e69c60348ef9d4742c32c3232c9b8739 (diff)
downloadbcm5719-llvm-6db3cfe2da6bc0236509c2b6a18e23c15fc498ff.tar.gz
bcm5719-llvm-6db3cfe2da6bc0236509c2b6a18e23c15fc498ff.zip
[AArch64][GlobalISel] Select G_XOR.
llvm-svn: 277173
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
index 9c48d32897f..367fa00ee11 100644
--- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -52,6 +52,8 @@ static unsigned selectBinaryOp(unsigned GenericOpc, unsigned RegBankID,
switch (GenericOpc) {
case TargetOpcode::G_OR:
return AArch64::ORRWrr;
+ case TargetOpcode::G_XOR:
+ return AArch64::EORWrr;
case TargetOpcode::G_AND:
return AArch64::ANDWrr;
case TargetOpcode::G_ADD:
@@ -65,6 +67,8 @@ static unsigned selectBinaryOp(unsigned GenericOpc, unsigned RegBankID,
switch (GenericOpc) {
case TargetOpcode::G_OR:
return AArch64::ORRXrr;
+ case TargetOpcode::G_XOR:
+ return AArch64::EORXrr;
case TargetOpcode::G_AND:
return AArch64::ANDXrr;
case TargetOpcode::G_ADD:
@@ -166,6 +170,7 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const {
}
case TargetOpcode::G_OR:
+ case TargetOpcode::G_XOR:
case TargetOpcode::G_AND:
case TargetOpcode::G_ADD:
case TargetOpcode::G_SUB: {
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