diff options
| author | Chris Lattner <sabre@nondot.org> | 2009-04-30 00:48:50 +0000 | 
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2009-04-30 00:48:50 +0000 | 
| commit | 5ab42e93c47aef318f6554e2c5e2e55fe47a0834 (patch) | |
| tree | 43697e78bc5e573f7d81145439e4330fe37c727b /llvm/lib | |
| parent | 352ee2cb05637518b47a8bfc34f83ede796acd07 (diff) | |
| download | bcm5719-llvm-5ab42e93c47aef318f6554e2c5e2e55fe47a0834.tar.gz bcm5719-llvm-5ab42e93c47aef318f6554e2c5e2e55fe47a0834.zip | |
fix a regression handling indirect results: these need to be considered
memory operands otherwise the writebacks get lost when the inline asm 
doesn't otherwise have side effects.  This fixes rdar://6839427, though
clang really shouldn't generate these anymore.
llvm-svn: 70455
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp | 21 | 
1 files changed, 13 insertions, 8 deletions
| diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index 01d73b3ffbf..71f5d813144 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -5075,6 +5075,10 @@ hasInlineAsmMemConstraint(std::vector<InlineAsm::ConstraintInfo> &CInfos,        if (CType == TargetLowering::C_Memory)          return true;      } +     +    // Indirect operand accesses access memory. +    if (CI.isIndirect) +      return true;    }    return false; @@ -5088,11 +5092,6 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {    /// ConstraintOperands - Information about all of the constraints.    std::vector<SDISelAsmOperandInfo> ConstraintOperands; -  // We won't need to flush pending loads if this asm doesn't touch -  // memory and is nonvolatile. -  SDValue Chain = IA->hasSideEffects() ? getRoot() : DAG.getRoot(); -  SDValue Flag; -    std::set<unsigned> OutputRegs, InputRegs;    // Do a prepass over the constraints, canonicalizing them, and building up the @@ -5101,10 +5100,15 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {      ConstraintInfos = IA->ParseConstraints();    bool hasMemory = hasInlineAsmMemConstraint(ConstraintInfos, TLI); -  // Flush pending loads if this touches memory (includes clobbering it). -  // It's possible this is overly conservative. -  if (hasMemory) +   +  SDValue Chain, Flag; +   +  // We won't need to flush pending loads if this asm doesn't touch +  // memory and is nonvolatile. +  if (hasMemory || IA->hasSideEffects())      Chain = getRoot(); +  else +    Chain = DAG.getRoot();    unsigned ArgNo = 0;   // ArgNo - The argument of the CallInst.    unsigned ResNo = 0;   // ResNo - The result number of the next output. @@ -5482,6 +5486,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {      SDValue OutVal = OutRegs.getCopyFromRegs(DAG, getCurDebugLoc(),                                               Chain, &Flag);      StoresToEmit.push_back(std::make_pair(OutVal, Ptr)); +    }    // Emit the non-flagged stores from the physregs. | 

