fix a regression handling indirect results: these need to be considered

memory operands otherwise the writebacks get lost when the inline asm 
doesn't otherwise have side effects.  This fixes rdar://6839427, though
clang really shouldn't generate these anymore.

llvm-svn: 70455

2 files changed, 35 insertions, 8 deletions

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 01d73b3ffbf..71f5d813144 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -5075,6 +5075,10 @@ hasInlineAsmMemConstraint(std::vector<InlineAsm::ConstraintInfo> &CInfos,
       if (CType == TargetLowering::C_Memory)
         return true;
     }
+    
+    // Indirect operand accesses access memory.
+    if (CI.isIndirect)
+      return true;
   }
 
   return false;
@@ -5088,11 +5092,6 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
   /// ConstraintOperands - Information about all of the constraints.
   std::vector<SDISelAsmOperandInfo> ConstraintOperands;
 
-  // We won't need to flush pending loads if this asm doesn't touch
-  // memory and is nonvolatile.
-  SDValue Chain = IA->hasSideEffects() ? getRoot() : DAG.getRoot();
-  SDValue Flag;
-
   std::set<unsigned> OutputRegs, InputRegs;
 
   // Do a prepass over the constraints, canonicalizing them, and building up the
@@ -5101,10 +5100,15 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
     ConstraintInfos = IA->ParseConstraints();
 
   bool hasMemory = hasInlineAsmMemConstraint(ConstraintInfos, TLI);
-  // Flush pending loads if this touches memory (includes clobbering it).
-  // It's possible this is overly conservative.
-  if (hasMemory)
+  
+  SDValue Chain, Flag;
+  
+  // We won't need to flush pending loads if this asm doesn't touch
+  // memory and is nonvolatile.
+  if (hasMemory || IA->hasSideEffects())
     Chain = getRoot();
+  else
+    Chain = DAG.getRoot();
 
   unsigned ArgNo = 0;   // ArgNo - The argument of the CallInst.
   unsigned ResNo = 0;   // ResNo - The result number of the next output.
@@ -5482,6 +5486,7 @@ void SelectionDAGLowering::visitInlineAsm(CallSite CS) {
     SDValue OutVal = OutRegs.getCopyFromRegs(DAG, getCurDebugLoc(),
                                              Chain, &Flag);
     StoresToEmit.push_back(std::make_pair(OutVal, Ptr));
+
   }
 
   // Emit the non-flagged stores from the physregs.
diff --git a/llvm/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll b/llvm/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll
new file mode 100644
index 00000000000..fc31c0b416d
--- /dev/null
+++ b/llvm/test/CodeGen/X86/2009-04-29-IndirectDestOperands.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc | grep {movl.*%ebx, 8(%esi)}
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.0"
+
+define void @cpuid(i32* %data) nounwind {
+entry:
+	%arrayidx = getelementptr i32* %data, i32 1		; <i32*> [#uses=1]
+	%arrayidx2 = getelementptr i32* %data, i32 2		; <i32*> [#uses=1]
+	%arrayidx4 = getelementptr i32* %data, i32 3		; <i32*> [#uses=1]
+	%arrayidx6 = getelementptr i32* %data, i32 4		; <i32*> [#uses=1]
+	%arrayidx8 = getelementptr i32* %data, i32 5		; <i32*> [#uses=1]
+	%tmp9 = load i32* %arrayidx8		; <i32> [#uses=1]
+	%arrayidx11 = getelementptr i32* %data, i32 6		; <i32*> [#uses=1]
+	%tmp12 = load i32* %arrayidx11		; <i32> [#uses=1]
+	%arrayidx14 = getelementptr i32* %data, i32 7		; <i32*> [#uses=1]
+	%tmp15 = load i32* %arrayidx14		; <i32> [#uses=1]
+	%arrayidx17 = getelementptr i32* %data, i32 8		; <i32*> [#uses=1]
+	%tmp18 = load i32* %arrayidx17		; <i32> [#uses=1]
+	%0 = call i32 asm "cpuid", "={ax},=*{bx},=*{cx},=*{dx},{ax},{bx},{cx},{dx},~{dirflag},~{fpsr},~{flags}"(i32* %arrayidx2, i32* %arrayidx4, i32* %arrayidx6, i32 %tmp9, i32 %tmp12, i32 %tmp15, i32 %tmp18) nounwind		; <i32> [#uses=1]
+	store i32 %0, i32* %arrayidx
+	ret void
+}