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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-04-17 02:03:08 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-04-17 02:03:08 +0000 |
| commit | 51df0c196587c9e2e341d657e86abd5d70da177a (patch) | |
| tree | 1931246d915d7dc590ea2968aeec459628d74260 /llvm/lib | |
| parent | 100b24abc5a08552e0d94371561785d688249438 (diff) | |
| download | bcm5719-llvm-51df0c196587c9e2e341d657e86abd5d70da177a.tar.gz bcm5719-llvm-51df0c196587c9e2e341d657e86abd5d70da177a.zip | |
R600/SI: Fix zext from i1 to i64
llvm-svn: 206437
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 175709cad6d..235665ab89e 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -972,8 +972,12 @@ SDValue SITargetLowering::LowerZERO_EXTEND(SDValue Op, return SDValue(); } - return DAG.getNode(ISD::BUILD_PAIR, DL, VT, Op.getOperand(0), - DAG.getConstant(0, MVT::i32)); + SDValue Src = Op.getOperand(0); + if (Src.getValueType() != MVT::i32) + Src = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, Src); + + SDValue Zero = DAG.getConstant(0, MVT::i32); + return DAG.getNode(ISD::BUILD_PAIR, DL, VT, Src, Zero); } //===----------------------------------------------------------------------===// |
