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| author | Hao Liu <Hao.Liu@arm.com> | 2014-02-13 02:36:58 +0000 |
|---|---|---|
| committer | Hao Liu <Hao.Liu@arm.com> | 2014-02-13 02:36:58 +0000 |
| commit | 4f345f3c03e648145794e754aacaf1093f1ce3b6 (patch) | |
| tree | a0367f71d0991c02bf50ff7837703190b6dc0bf4 /llvm/lib | |
| parent | 22b19da9fc9f78e4e4097fa953b51be5961987b3 (diff) | |
| download | bcm5719-llvm-4f345f3c03e648145794e754aacaf1093f1ce3b6.tar.gz bcm5719-llvm-4f345f3c03e648145794e754aacaf1093f1ce3b6.zip | |
[AArch64]Add support for spilling FPR8/FPR16.
llvm-svn: 201287
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp index 9c27f82d2b3..092af05e199 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -487,6 +487,10 @@ AArch64InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, default: llvm_unreachable("Unknown size for regclass"); } + } else if (AArch64::FPR8RegClass.hasSubClassEq(RC)) { + StoreOp = AArch64::LSFP8_STR; + } else if (AArch64::FPR16RegClass.hasSubClassEq(RC)) { + StoreOp = AArch64::LSFP16_STR; } else if (RC->hasType(MVT::f32) || RC->hasType(MVT::f64) || RC->hasType(MVT::f128)) { switch (RC->getSize()) { @@ -553,6 +557,10 @@ AArch64InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, default: llvm_unreachable("Unknown size for regclass"); } + } else if (AArch64::FPR8RegClass.hasSubClassEq(RC)) { + LoadOp = AArch64::LSFP8_LDR; + } else if (AArch64::FPR16RegClass.hasSubClassEq(RC)) { + LoadOp = AArch64::LSFP16_LDR; } else if (RC->hasType(MVT::f32) || RC->hasType(MVT::f64) || RC->hasType(MVT::f128)) { switch (RC->getSize()) { |
