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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-31 09:15:54 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-03-31 09:15:54 +0000 |
| commit | 3b8ad346f99344f93ecda94e8327caa332c4b2a8 (patch) | |
| tree | d1f8b7888cc2e532281b56b45124797f1a1e6cdb /llvm/lib | |
| parent | 8c8ebd7945270d935c598b50ff3f2e0490f12ab0 (diff) | |
| download | bcm5719-llvm-3b8ad346f99344f93ecda94e8327caa332c4b2a8.tar.gz bcm5719-llvm-3b8ad346f99344f93ecda94e8327caa332c4b2a8.zip | |
[X86][Btver2] Add MMX_PSHUFB to the JWritePSHUFB InstRW entries
llvm-svn: 328918
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleBtVer2.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index 86ee44b4dec..1adcd519e42 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -717,14 +717,14 @@ def JWritePSHUFB: SchedWriteRes<[JFPU01, JVALU]> { let ResourceCycles = [1, 4]; let NumMicroOps = 3; } -def : InstRW<[JWritePSHUFB], (instrs PSHUFBrr, VPSHUFBrr)>; +def : InstRW<[JWritePSHUFB], (instrs MMX_PSHUFBrr, PSHUFBrr, VPSHUFBrr)>; def JWritePSHUFBLd: SchedWriteRes<[JLAGU, JFPU01, JVALU]> { let Latency = 7; let ResourceCycles = [1, 1, 4]; let NumMicroOps = 3; } -def : InstRW<[JWritePSHUFBLd, ReadAfterLd], (instrs PSHUFBrm, VPSHUFBrm)>; +def : InstRW<[JWritePSHUFBLd, ReadAfterLd], (instrs MMX_PSHUFBrm, PSHUFBrm, VPSHUFBrm)>; def JWriteVPERM: SchedWriteRes<[JFPU01, JFPX]> { let Latency = 2; |
