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authorEvan Cheng <evan.cheng@apple.com>2007-04-17 20:23:34 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-04-17 20:23:34 +0000
commit2f45bf31c521a89dd944adcf575ddb5059959f51 (patch)
tree7e4b921e4c2dd98b4d021f782c3310ccbec23d61 /llvm/lib
parent8387cf1100079652df3e8efd8059e2a0345e7a66 (diff)
downloadbcm5719-llvm-2f45bf31c521a89dd944adcf575ddb5059959f51.tar.gz
bcm5719-llvm-2f45bf31c521a89dd944adcf575ddb5059959f51.zip
Change getAllocatableSet() so it returns allocatable registers for a specific register class.
llvm-svn: 36215
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/MRegisterInfo.cpp11
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/lib/Target/MRegisterInfo.cpp b/llvm/lib/Target/MRegisterInfo.cpp
index 08039208fe8..ae9f20372fc 100644
--- a/llvm/lib/Target/MRegisterInfo.cpp
+++ b/llvm/lib/Target/MRegisterInfo.cpp
@@ -34,13 +34,16 @@ MRegisterInfo::MRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
MRegisterInfo::~MRegisterInfo() {}
-BitVector MRegisterInfo::getAllocatableSet(MachineFunction &MF) const {
+BitVector MRegisterInfo::getAllocatableSet(MachineFunction &MF,
+ const TargetRegisterClass *RC) const {
BitVector Allocatable(NumRegs);
for (MRegisterInfo::regclass_iterator I = regclass_begin(),
E = regclass_end(); I != E; ++I) {
- const TargetRegisterClass *RC = *I;
- for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF),
- E = RC->allocation_order_end(MF); I != E; ++I)
+ const TargetRegisterClass *TRC = *I;
+ if (RC && TRC != RC)
+ continue;
+ for (TargetRegisterClass::iterator I = TRC->allocation_order_begin(MF),
+ E = TRC->allocation_order_end(MF); I != E; ++I)
Allocatable.set(*I);
}
return Allocatable;
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