crc32 with 64-bit output zeros upper 32-bits. rdar://9467055

llvm-svn: 131664

1 files changed, 13 insertions, 0 deletions

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9b985f94ad4..be8650ec079 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -10939,6 +10939,19 @@ void X86TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
     KnownZero |= APInt::getHighBitsSet(Mask.getBitWidth(),
                                        Mask.getBitWidth() - 1);
     break;
+
+  case ISD::INTRINSIC_WO_CHAIN: {
+    unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
+    switch (IntNo) {
+      default: break;
+      case Intrinsic::x86_sse42_crc64_8:
+      case Intrinsic::x86_sse42_crc64_64:
+        // crc32 with 64-bit destination zeros high 32-bit.
+        KnownZero |= APInt::getHighBitsSet(64, 32);
+        break;
+    }
+    break;
+  }
   }
 }