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| author | Evan Cheng <evan.cheng@apple.com> | 2011-05-19 18:57:12 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-05-19 18:57:12 +0000 |
| commit | 2b9bd386784a3d8020b966316075f03192dd0f58 (patch) | |
| tree | e4732c9ae03173471dd1acfefa5186edd5c29968 /llvm | |
| parent | 4a4e5a2b55136e3e3efd6549c2e988487ca25b62 (diff) | |
| download | bcm5719-llvm-2b9bd386784a3d8020b966316075f03192dd0f58.tar.gz bcm5719-llvm-2b9bd386784a3d8020b966316075f03192dd0f58.zip | |
crc32 with 64-bit output zeros upper 32-bits. rdar://9467055
llvm-svn: 131664
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 13 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/crc64.ll | 19 |
2 files changed, 32 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9b985f94ad4..be8650ec079 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -10939,6 +10939,19 @@ void X86TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op, KnownZero |= APInt::getHighBitsSet(Mask.getBitWidth(), Mask.getBitWidth() - 1); break; + + case ISD::INTRINSIC_WO_CHAIN: { + unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); + switch (IntNo) { + default: break; + case Intrinsic::x86_sse42_crc64_8: + case Intrinsic::x86_sse42_crc64_64: + // crc32 with 64-bit destination zeros high 32-bit. + KnownZero |= APInt::getHighBitsSet(64, 32); + break; + } + break; + } } } diff --git a/llvm/test/CodeGen/X86/crc64.ll b/llvm/test/CodeGen/X86/crc64.ll new file mode 100644 index 00000000000..1e0aa0db36a --- /dev/null +++ b/llvm/test/CodeGen/X86/crc64.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -march=x86-64 -mattr=sse42 | FileCheck %s + +; crc32 with 64-bit destination zeros high 32-bit. +; rdar://9467055 + +define i64 @t() nounwind { +entry: +; CHECK: t: +; CHECK: crc32q +; CHECK-NOT: mov +; CHECK-NEXT: crc32q + %0 = tail call i64 @llvm.x86.sse42.crc64.64(i64 0, i64 4) nounwind + %1 = and i64 %0, 4294967295 + %2 = tail call i64 @llvm.x86.sse42.crc64.64(i64 %1, i64 4) nounwind + %3 = and i64 %2, 4294967295 + ret i64 %3 +} + +declare i64 @llvm.x86.sse42.crc64.64(i64, i64) nounwind readnone |
