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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-21 22:56:30 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-21 22:56:30 +0000 |
| commit | 2a0320c877afced69cb54f895c65124e7b20be2d (patch) | |
| tree | 648a70c6738d14aff6c4efe9f15d1c48199891eb /llvm/lib | |
| parent | 17806e66369a111489e85ba5688f2ad61609add2 (diff) | |
| download | bcm5719-llvm-2a0320c877afced69cb54f895c65124e7b20be2d.tar.gz bcm5719-llvm-2a0320c877afced69cb54f895c65124e7b20be2d.zip | |
ARM assembly parsing support for RSC instruction.
Add two-operand instruction aliases. Add parsing and encoding tests for
variants of the instruction.
llvm-svn: 135713
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 04ee268187a..41808c53328 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -4270,3 +4270,16 @@ def : InstAlias<"rsb${s}${p} $Rdn, $shift", def : InstAlias<"rsb${s}${p} $Rdn, $shift", (RSBrsr GPR:$Rdn, GPR:$Rdn, so_reg_reg:$shift, pred:$p, cc_out:$s)>, Requires<[IsARM]>; +// RSC two-operand forms (optional explicit destination operand) +def : InstAlias<"rsc${s}${p} $Rdn, $imm", + (RSCri GPR:$Rdn, GPR:$Rdn, so_imm:$imm, pred:$p, cc_out:$s)>, + Requires<[IsARM]>; +def : InstAlias<"rsc${s}${p} $Rdn, $Rm", + (RSCrr GPR:$Rdn, GPR:$Rdn, GPR:$Rm, pred:$p, cc_out:$s)>, + Requires<[IsARM]>; +def : InstAlias<"rsc${s}${p} $Rdn, $shift", + (RSCrsi GPR:$Rdn, GPR:$Rdn, so_reg_imm:$shift, pred:$p, + cc_out:$s)>, Requires<[IsARM]>; +def : InstAlias<"rsc${s}${p} $Rdn, $shift", + (RSCrsr GPR:$Rdn, GPR:$Rdn, so_reg_reg:$shift, pred:$p, + cc_out:$s)>, Requires<[IsARM]>; |
