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authorJim Grosbach <grosbach@apple.com>2011-07-21 22:37:43 +0000
committerJim Grosbach <grosbach@apple.com>2011-07-21 22:37:43 +0000
commit17806e66369a111489e85ba5688f2ad61609add2 (patch)
treebaea370b84e9298d55260393419954e96990d1e2 /llvm/lib
parent7fb091977d47955acbf37509956f9b29720e0b8f (diff)
downloadbcm5719-llvm-17806e66369a111489e85ba5688f2ad61609add2.tar.gz
bcm5719-llvm-17806e66369a111489e85ba5688f2ad61609add2.zip
ARM assembly parsing support for RSB instruction.
Add two-operand instruction aliases. Add parsing and encoding tests for variants of the instruction. llvm-svn: 135712
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td14
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index fdc2533fe31..04ee268187a 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -4256,3 +4256,17 @@ def : InstAlias<"push${p} $regs",
(STMDB_UPD SP, pred:$p, reglist:$regs)>;
def : InstAlias<"pop${p} $regs",
(LDMIA_UPD SP, pred:$p, reglist:$regs)>;
+
+// RSB two-operand forms (optional explicit destination operand)
+def : InstAlias<"rsb${s}${p} $Rdn, $imm",
+ (RSBri GPR:$Rdn, GPR:$Rdn, so_imm:$imm, pred:$p, cc_out:$s)>,
+ Requires<[IsARM]>;
+def : InstAlias<"rsb${s}${p} $Rdn, $Rm",
+ (RSBrr GPR:$Rdn, GPR:$Rdn, GPR:$Rm, pred:$p, cc_out:$s)>,
+ Requires<[IsARM]>;
+def : InstAlias<"rsb${s}${p} $Rdn, $shift",
+ (RSBrsi GPR:$Rdn, GPR:$Rdn, so_reg_imm:$shift, pred:$p,
+ cc_out:$s)>, Requires<[IsARM]>;
+def : InstAlias<"rsb${s}${p} $Rdn, $shift",
+ (RSBrsr GPR:$Rdn, GPR:$Rdn, so_reg_reg:$shift, pred:$p,
+ cc_out:$s)>, Requires<[IsARM]>;
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